From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758955AbbIVSMc (ORCPT ); Tue, 22 Sep 2015 14:12:32 -0400 Received: from smtp.transmode.se ([31.15.61.139]:59201 "EHLO smtp.transmode.se" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757929AbbIVSMa convert rfc822-to-8bit (ORCPT ); Tue, 22 Sep 2015 14:12:30 -0400 From: Joakim Tjernlund To: "christophe.leroy@c-s.fr" , "paulus@samba.org" , "mpe@ellerman.id.au" , "benh@kernel.crashing.org" , "scottwood@freescale.com" CC: "linuxppc-dev@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline Thread-Topic: [PATCH v2 22/25] powerpc32: move xxxxx_dcache_range() functions inline Thread-Index: AQHQ9VspxrgpWLe1w0WBxWBczXIu3p5IuDyA Date: Tue, 22 Sep 2015 18:12:27 +0000 Message-ID: <1442945547.29498.50.camel@transmode.se> References: In-Reply-To: Accept-Language: en-US, sv-SE Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: Evolution 3.16.5 x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [192.168.200.4] Content-Type: text/plain; charset=US-ASCII Content-ID: Content-Transfer-Encoding: 7BIT MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2015-09-22 at 18:51 +0200, Christophe Leroy wrote: > flush/clean/invalidate _dcache_range() functions are all very > similar and are quite short. They are mainly used in __dma_sync() > perf_event locate them in the top 3 consumming functions during > heavy ethernet activity > > They are good candidate for inlining, as __dma_sync() does > almost nothing but calling them > > Signed-off-by: Christophe Leroy > --- > New in v2 > > arch/powerpc/include/asm/cacheflush.h | 55 +++++++++++++++++++++++++++-- > arch/powerpc/kernel/misc_32.S | 65 ----------------------------------- > arch/powerpc/kernel/ppc_ksyms.c | 2 ++ > 3 files changed, 54 insertions(+), 68 deletions(-) > > diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h > index 6229e6b..6169604 100644 > --- a/arch/powerpc/include/asm/cacheflush.h > +++ b/arch/powerpc/include/asm/cacheflush.h > @@ -47,12 +47,61 @@ static inline void __flush_dcache_icache_phys(unsigned long physaddr) > } > #endif > > -extern void flush_dcache_range(unsigned long start, unsigned long stop); > #ifdef CONFIG_PPC32 > -extern void clean_dcache_range(unsigned long start, unsigned long stop); > -extern void invalidate_dcache_range(unsigned long start, unsigned long stop); > +/* > + * Write any modified data cache blocks out to memory and invalidate them. > + * Does not invalidate the corresponding instruction cache blocks. > + */ > +static inline void flush_dcache_range(unsigned long start, unsigned long stop) > +{ > + void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1)); > + unsigned int size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1); > + unsigned int i; > + > + for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES) > + dcbf(addr); > + if (i) > + mb(); /* sync */ > +} This feels optimized for the uncommon case when there is no invalidation. I THINK it would be better to bail early and use do { .. } while(--i); instead. Jocke