From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932691AbbJPQOw (ORCPT ); Fri, 16 Oct 2015 12:14:52 -0400 Received: from mail-wi0-f170.google.com ([209.85.212.170]:36909 "EHLO mail-wi0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754455AbbJPQOc (ORCPT ); Fri, 16 Oct 2015 12:14:32 -0400 Message-ID: <1445012067.2756.7.camel@gmail.com> Subject: Re: [PATCH 1/4] x86, perf: Use a new PMU ack sequence on Skylake From: Mike Galbraith To: Peter Zijlstra Cc: Andi Kleen , Andi Kleen , linux-kernel@vger.kernel.org, Ingo Molnar , Thomas Gleixner Date: Fri, 16 Oct 2015 18:14:27 +0200 In-Reply-To: <20151016150035.GY3816@twins.programming.kicks-ass.net> References: <1444952280-24184-1-git-send-email-andi@firstfloor.org> <1444952280-24184-2-git-send-email-andi@firstfloor.org> <20151016115107.GV3816@twins.programming.kicks-ass.net> <20151016133514.GB15102@tassilo.jf.intel.com> <20151016150035.GY3816@twins.programming.kicks-ass.net> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.12.11 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 2015-10-16 at 17:00 +0200, Peter Zijlstra wrote: > On Fri, Oct 16, 2015 at 06:35:14AM -0700, Andi Kleen wrote: > > > > In principle the sequence should work on other CPUs too, but > > > > since I only tested on Skylake it is only enabled there. > > > > > > I would very much like a reduction of the ack states. You introduced the > > > late thing, which should also work for everyone, and now you introduce > > > yet another variant. > > > > Ingo suggested to do it this way. Originally I thought it wasn't needed, > > but I think now that late-ack made some of the races that eventually > > caused Skylake LBR to fall over worse. So in hindsight it was a good idea > > to not use it everywhere. > > > > > I would very much prefer a single ack scheme if at all possible. > > > > Could enable it everywhere, but then users would need to test it > > on most types of CPUs, as I can't. > > I think Mike still has a Core2 machine (and I might be able to dig out a > laptop), Ingo should have a NHM(-EP), I have SNB, IVB-EP, HSW. So if you > could test at least BDW and SKL we might have decent test coverage. Yeah, beloved ole Q6600 box, a U4100 lappy too. -Mike