From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753732AbbJZLGc (ORCPT ); Mon, 26 Oct 2015 07:06:32 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:56670 "EHLO mx0a-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753616AbbJZLG2 (ORCPT ); Mon, 26 Oct 2015 07:06:28 -0400 From: Jisheng Zhang To: , , , , , , , CC: , , , , , Jisheng Zhang Subject: [RFC PATCH 0/3] PCI: generate proper configuration access cycles Date: Mon, 26 Oct 2015 19:02:11 +0800 Message-ID: <1445857334-6936-1-git-send-email-jszhang@marvell.com> X-Mailer: git-send-email 2.6.2 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2015-10-26_09:,, signatures=0 X-Proofpoint-Spam-Details: rule=inbound_notspam policy=inbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310000 definitions=main-1510260190 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Inspired by Russell King's patch[1], I found some pci hosts also have the same issue of "reading 32-bits from the command register, modifying the command register, and then writing it back has the effect of clearing any status bits that were indicating at that time" as pointed out by Russell. Fix them by using the pci_generic_config_write. Another problem is do we need to use proper readb/readw for config read? Jisheng Zhang (3): PCI: iproc: generate proper configuration access cycles PCI: tegra: generate proper configuration access cycles PCI: xgene: generate proper configuration access cycles drivers/pci/host/pci-tegra.c | 2 +- drivers/pci/host/pci-xgene.c | 2 +- drivers/pci/host/pcie-iproc.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) -- 2.6.2