From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
David Airlie <airlied@linux.ie>,
Thierry Reding <thierry.reding@gmail.com>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
Alexander Kaplan <alex@nextthing.co>,
Wynter Woods <wynter@nextthing.co>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Rob Clark <robdclark@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Maxime Ripard <maxime.ripard@free-electrons.com>
Subject: [PATCH 15/19] ARM: sun5i: dt: Add display and TCON clocks
Date: Fri, 30 Oct 2015 15:21:01 +0100 [thread overview]
Message-ID: <1446214865-3972-16-git-send-email-maxime.ripard@free-electrons.com> (raw)
In-Reply-To: <1446214865-3972-1-git-send-email-maxime.ripard@free-electrons.com>
Enable the display and TCON (channel 0 and channel 1) clocks that are going
to be needed to drive the display engine, tcon and TV encoders.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
---
arch/arm/boot/dts/sun5i-a10s.dtsi | 8 +++---
arch/arm/boot/dts/sun5i-a13.dtsi | 3 ++-
arch/arm/boot/dts/sun5i-r8.dtsi | 5 ++--
arch/arm/boot/dts/sun5i.dtsi | 53 +++++++++++++++++++++++++++++++++++++++
4 files changed, 63 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index bddd0de88af6..0981a9e2db3b 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -65,8 +65,9 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
- clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
- <&ahb_gates 44>;
+ clocks = <&ahb_gates 36>, <&ahb_gates 43>,
+ <&ahb_gates 44>, <&de_be_clk>,
+ <&tcon_ch1_clk>;
status = "disabled";
};
@@ -74,7 +75,8 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
- clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+ clocks = <&ahb_gates 36>, <&ahb_gates 44>,
+ <&de_be_clk>, <&tcon_ch0_clk>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index d910d3a6c41c..130644d7e054 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -61,7 +61,8 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
- clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
+ clocks = <&ahb_gates 36>, <&ahb_gates 44>, <&de_be_clk>,
+ <&tcon_ch0_clk>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/sun5i-r8.dtsi b/arch/arm/boot/dts/sun5i-r8.dtsi
index 0ef865601ac9..b1e4e0170d51 100644
--- a/arch/arm/boot/dts/sun5i-r8.dtsi
+++ b/arch/arm/boot/dts/sun5i-r8.dtsi
@@ -51,8 +51,9 @@
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
- clocks = <&pll5 1>, <&ahb_gates 34>, <&ahb_gates 36>,
- <&ahb_gates 44>;
+ clocks = <&ahb_gates 34>, <&ahb_gates 36>,
+ <&ahb_gates 44>, <&de_be_clk>,
+ <&tcon_ch1_clk>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi
index bde9a545b79f..861c5a621e70 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i.dtsi
@@ -129,6 +129,15 @@
clock-output-names = "pll3";
};
+ pll3x2: pll3x2_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <2>;
+ clocks = <&pll3>;
+ clock-output-names = "pll3x2";
+ };
+
pll4: clk@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-pll1-clk";
@@ -161,6 +170,15 @@
clock-output-names = "pll7";
};
+ pll7x2: pll7x2_clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clock-div = <1>;
+ clock-mult = <2>;
+ clocks = <&pll7>;
+ clock-output-names = "pll7x2";
+ };
+
/* dummy is 200M */
cpu: cpu@01c20054 {
#clock-cells = <0>;
@@ -320,6 +338,41 @@
clock-output-names = "usb_ohci0", "usb_phy";
};
+ de_be_clk: clk@01c20104 {
+ #clock-cells = <0>;
+ #reset-cells = <0>;
+ compatible = "allwinner,sun4i-a10-display-clk";
+ reg = <0x01c20104 0x4>;
+ clocks = <&pll3>, <&pll7>, <&pll5 1>;
+ clock-output-names = "de-be";
+ };
+
+ de_fe_clk: clk@01c2010c {
+ #clock-cells = <0>;
+ #reset-cells = <0>;
+ compatible = "allwinner,sun4i-a10-display-clk";
+ reg = <0x01c2010c 0x4>;
+ clocks = <&pll3>, <&pll7>, <&pll5 1>;
+ clock-output-names = "de-fe";
+ };
+
+ tcon_ch0_clk: clk@01c20118 {
+ #clock-cells = <0>;
+ #reset-cells = <1>;
+ compatible = "allwinner,sun4i-a10-tcon-ch0-clk";
+ reg = <0x01c20118 0x4>;
+ clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
+ clock-output-names = "tcon-ch0-sclk";
+ };
+
+ tcon_ch1_clk: clk@01c2012c {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun4i-a10-tcon-ch1-clk";
+ reg = <0x01c2012c 0x4>;
+ clocks = <&pll3>, <&pll7>, <&pll3x2>, <&pll7x2>;
+ clock-output-names = "tcon-ch1-sclk";
+ };
+
codec_clk: clk@01c20140 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-a10-codec-clk";
--
2.6.2
next prev parent reply other threads:[~2015-10-30 14:23 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-30 14:20 [PATCH 00/19] drm: Add Allwinner A10 display engine support Maxime Ripard
2015-10-30 14:20 ` [PATCH 01/19] clk: sunxi: Add display clock Maxime Ripard
2015-10-30 21:29 ` Stephen Boyd
2015-11-06 23:39 ` Maxime Ripard
2015-11-12 20:31 ` Stephen Boyd
2015-11-19 15:42 ` Maxime Ripard
2015-10-31 10:28 ` Chen-Yu Tsai
2015-11-06 19:42 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 02/19] clk: sunxi: Add PLL3 clock Maxime Ripard
2015-10-30 21:32 ` Stephen Boyd
2015-10-30 14:20 ` [PATCH 03/19] clk: sunxi: Add TCON channel0 clock Maxime Ripard
2015-10-31 10:19 ` Chen-Yu Tsai
2015-11-06 22:11 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 04/19] clk: sunxi: Add TCON channel1 clock Maxime Ripard
2015-10-30 21:37 ` Stephen Boyd
2015-11-07 0:11 ` Maxime Ripard
2015-10-31 9:53 ` Chen-Yu Tsai
2015-11-07 0:01 ` Maxime Ripard
2015-11-09 3:36 ` Chen-Yu Tsai
2015-11-19 15:35 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 05/19] clk: sunxi: add DRAM gates Maxime Ripard
2015-11-09 4:18 ` Chen-Yu Tsai
2015-11-13 8:08 ` Chen-Yu Tsai
2015-11-19 15:43 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 06/19] clk: sunxi: Add Allwinner R8 AHB gates support Maxime Ripard
2015-10-30 16:01 ` Chen-Yu Tsai
2015-10-30 16:33 ` Hans de Goede
2015-10-30 14:20 ` [PATCH 07/19] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard
2015-10-30 17:32 ` Thierry Reding
2015-11-07 0:44 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 08/19] drm: Add Allwinner A10 Display Engine support Maxime Ripard
2015-10-30 14:44 ` Daniel Vetter
2015-11-11 22:14 ` Maxime Ripard
2015-11-16 15:04 ` Daniel Vetter
2015-10-30 14:20 ` [PATCH 09/19] drm: sun4i: Add DT bindings documentation Maxime Ripard
2015-10-30 16:40 ` Rob Herring
2015-10-30 17:37 ` Thierry Reding
2015-11-01 14:28 ` Rob Herring
2015-11-06 22:32 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 10/19] drm: sun4i: Add RGB output Maxime Ripard
2015-10-30 14:20 ` [PATCH 11/19] drm: sun4i: Add composite output Maxime Ripard
2015-11-02 2:53 ` [linux-sunxi] " Jonathan Liu
2015-11-07 0:35 ` Maxime Ripard
2015-10-30 14:20 ` [PATCH 12/19] drm: sun4i: tv: Add PAL output standard Maxime Ripard
2015-10-30 14:20 ` [PATCH 13/19] drm: sun4i: tv: Add NTSC " Maxime Ripard
2015-10-30 14:21 ` [PATCH 14/19] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard
2015-11-09 4:24 ` Chen-Yu Tsai
2015-10-30 14:21 ` Maxime Ripard [this message]
2015-10-30 14:21 ` [PATCH 16/19] ARM: sun5i: dt: Add DRAM gates Maxime Ripard
2015-10-30 14:21 ` [PATCH 17/19] ARM: sun5i: dt: Add display blocks to the DTSI Maxime Ripard
2015-10-30 14:21 ` [PATCH 18/19] ARM: sun5i: r8: Add AHB gates " Maxime Ripard
2015-10-30 14:21 ` [PATCH 19/19] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard
2015-10-30 15:20 ` Chen-Yu Tsai
2015-11-06 19:37 ` Maxime Ripard
2015-10-30 14:52 ` [PATCH 00/19] drm: Add Allwinner A10 display engine support Daniel Vetter
2015-11-12 5:12 ` Maxime Ripard
2015-11-09 3:43 ` Chen-Yu Tsai
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