From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757590AbbLBS2k (ORCPT ); Wed, 2 Dec 2015 13:28:40 -0500 Received: from mail-pa0-f44.google.com ([209.85.220.44]:34692 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750964AbbLBS2j (ORCPT ); Wed, 2 Dec 2015 13:28:39 -0500 From: Stephane Eranian To: linux-kernel@vger.kernel.org Cc: acme@redhat.com, peterz@infradead.org, mingo@elte.hu, ak@linux.intel.com, kan.liang@intel.com Subject: [PATCH v1 0/2] perf/x86: fixes and improvement for Intel Atom PEBS support Date: Wed, 2 Dec 2015 19:28:15 +0100 Message-Id: <1449080897-26149-1-git-send-email-eranian@google.com> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This short series fixes total breakage of Intel Atom PEBS support in recent kernels. The problems were introduced with the changes in the PEBS logic to handle deeper buffer. The first patch fixes PEBS and LBR problems, including NULL pointers, wrong pointer arithmetic, and wrong pebs record layout assumption. The second patch adds an alias for cycles:pp to Intel Atom given that perf record/top uses cycles:pp nowadays. Stephane Eranian (2): perf/x86: fix PEBS and LBR issues on Intel Atom perf/x86: enable cycles:pp for Intel Atom arch/x86/kernel/cpu/perf_event_intel.c | 30 ++++++++++++++++++++++++++++++ arch/x86/kernel/cpu/perf_event_intel_ds.c | 11 ++++++++++- arch/x86/kernel/cpu/perf_event_intel_lbr.c | 11 +++++++---- 3 files changed, 47 insertions(+), 5 deletions(-) -- 2.5.0