[PATCH v2 00/12] Add the family patches to support for kylin board

[PATCH v2 00/12] Add the family patches to support for kylin board

[Caesar Wang]

Hi all,

Happy new year! :)
Let's go on working for happy.

This series patches are based on kernel version 4.4.0-rc8+
(Linux version 4.4.0-rc8+ (wxt@ubuntu)...#142 SMP Thu Jan 7 12:38:40 CST 2016)

This series pacthes are verified on the following github:
https://github.com/Caesar-github/rockchip/commits/kylin-develop4.4

This series has 12 patches: (12--->1)
bbd1a01 ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs
fb8c1fd ARM: dts: rockchip: add the lcdc and hdmi node for rk3036
1aeb49d ARM: dts: rockchip: add the sdmmc for kylin board
3e19128 ARM: dts: rockchip: enable the uart0 for kylin board
e7de154 ARM: dts: rockchip: add the wifi/bt regulator for kylin board
8699698 ARM: dts: rockchip: enable the high speed on sdio for kylin board
21eded4 mmc: pwrseq: add support for power-on sequencing through DT
cdf3a7e mmc: pwrseq: Document optional exteral vcc for the simple power sequence
131c249 clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out
b7ff8e1 ARM: dts: rockchip: override the clocks in i2s for kylin board
5f56af4 ARM: dts: rockchip: add the sound codec for kylin board
914d9c0 ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
..

This series patches have the following decriptions:

PATCH[1/12-4/12]:====> Support rt5616 codec for kylin board
914d9c0 ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
5f56af4 ARM: dts: rockchip: add the sound codec for kylin board
b7ff8e1 ARM: dts: rockchip: override the clocks in i2s for kylin board
131c249 clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out

This patches is working for codec rt5616 on kylin board. (RK3036 SoCs)

That's needed the following rt5616 driver from Mark Brown Branch.
(cherry picked from git.kernel.org broonie/sound.git for-next)

cf94b7a UPSTREAM: ASoC: rt5616: rename some alsa control names
86f561d UPSTREAM: ASoC: rt5616: add devicetree document for rt5616
0e0f5f8 UPSTREAM: ASoC: rt5616: add an of_match table
263a330 UPSTREAM: ASoC: rt5616: Return error if device ID mismatch
0094139 UPSTREAM: ASoC: rt5616: add rt5616 codec driver

Notes:
I'm run it with the ubuntu 15.04 to set the configure.
./amixer "HP Playback Switch" 1
./amixer "HP Playback Volume" 20
./amixer "HPO MIX DAC1 Switch" 1
./amixer "OUT MIXR DAC R1 Switch" 1
./amixer "OUT MIXL DAC L1 Switch" 1
./amixer "Stereo DAC MIXR DAC R1 Switch" 1
./amixer "Stereo DAC MIXL DAC L1 Switch" 1

root@linaro-alip:/media/aplay# ./aplay pcm.wav
Playing sample: 2 ch, 48000 hz, 16 bit
..
That can be normal playing the music.
----

PATCH[5/12-9/12]: ====> Support wifi/bt module for kylin board
cdf3a7e mmc: pwrseq: Document optional exteral vcc for the simple power sequence
21eded4 mmc: pwrseq: add support for power-on sequencing through DT
8699698 ARM: dts: rockchip: enable the high speed on sdio for kylin board
e7de154 ARM: dts: rockchip: add the wifi/bt regulator for kylin board
3e19128 ARM: dts: rockchip: enable the uart0 for kylin board

The wifi/bt driver hasn't land in mainline, the driver is in here:
https://github.com/Caesar-github/rockchip/commit/1912ef4c0e358677904b0a0bbb83f9745066f0ec

wpa_supplicant -Dnl80211 -c /etc/wifi/wpa_supplicant.conf -i wlan0 -B
wpa_cli add_network
wpa_cli set_network 1 ssid \"wxt\"
wpa_cli set_network 1 psk \"123456789\"
wpa_cli select_network 1
wpa_cli save_config

ifconfig wlan0 192.168.1.105
route add default gw 192.168.1.1

root@linaro-alip:/# ping 192.168.1.1
PING 192.168.1.1 (192.168.1.1) 56(84) bytes of data.
64 bytes from 192.168.1.1: icmp_seq=1 ttl=64 time=6.83 ms
64 bytes from 192.168.1.1: icmp_seq=2 ttl=64 time=184 ms
64 bytes from 192.168.1.1: icmp_seq=3 ttl=64 time=9.21 ms
64 bytes from 192.168.1.1: icmp_seq=4 ttl=64 time=6.84 ms
64 bytes from 192.168.1.1: icmp_seq=5 ttl=64 time=11.2 ms
64 bytes from 192.168.1.1: icmp_seq=6 ttl=64 time=9.24 ms
64 bytes from 192.168.1.1: icmp_seq=7 ttl=64 time=12.9 ms
64 bytes from 192.168.1.1: icmp_seq=8 ttl=64 time=7.02 ms
64 bytes from 192.168.1.1: icmp_seq=9 ttl=64 time=24.3 ms
64 bytes from 192.168.1.1: icmp_seq=10 ttl=64 time=13.6 ms
64 bytes from 192.168.1.1: icmp_seq=11 ttl=64 time=3.87 m
...

The wifi throughput:

iperf -s -i 1
...
[  4] 116.0-117.0 sec  2.88 MBytes  24.1 Mbits/sec
[  4] 117.0-118.0 sec  2.99 MBytes  25.0 Mbits/sec
[  4] 118.0-119.0 sec  3.01 MBytes  25.2 Mbits/sec
[  4] 119.0-120.0 sec  2.89 MBytes  24.2 Mbits/sec
[  4]  0.0-120.4 sec   332 MBytes  23.1 Mbits/sec
----

PATCH[10/12]: ====> sdmmc patch for kylin board
ARM: dts: rockchip: add the sdmmc for kylin board

You should mark it "oaky" if you want to use the sdmmc.
This patch default is disabing the sdmmc since the sdmmc and
uart2(debug port) is reusing pin.
----

PATCH[11/12]: ====> hdmi/lcdc diaply patch for rk3036 dts
ARM: dts: rockchip: add the lcdc and hdmi node for rk3036

We can add this patch to support it since the Mark Yao has land
your vop support.
https://github.com/markyzq/kernel-drm-rockchip/commits/drm-rockchip-next-2015-12-28
----

PATCH[12/12]:====> DMA Patchs
ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs

In order to be better read/write for emmc.
This patch is based on the following:(Fix broken DMAFLUSHP on Rockchips platform)

3055695 FROMLIST: DMA: dmaengine: expose max burst capability to clientmZ
(am from https://patchwork.kernel.org/patch/7399361/)
ed56bee FROMLIST: DMA: pl330: add quirk for broken no flushp
(am from https://patchwork.kernel.org/patch/7399371/)
0c43bc3 FROMLIST: Documentation: arm-pl330: add description of arm, pl330-broken-no-flushp
(am from https://patchwork.kernel.org/patch/7399371/)
623a699 FROMLIST: DMA: pl330: support burst mode for dev-to-mem and mem-to-dev transmit
(am from https://patchwork.kernel.org/patch/7399381/)
----


Changes in v2:
- modify the commit.
- fix the mclk-fs as the 256.
- This fix inmmc-power-sequences, as Heiko comment on
  https://patchwork.kernel.org/patch/7903161/
- As Heiko comment, modify it to fit the simple-mmc-sequence.
- Add the uart0 commit content.

Caesar Wang (12):
  ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
  ARM: dts: rockchip: add the sound codec for kylin board
  ARM: dts: rockchip: override the clocks in i2s for kylin board
  clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for
    sclk_i2s_out
  mmc: pwrseq: Document optional exteral vcc for the simple power
    sequence
  mmc: pwrseq: add support for power-on sequencing through DT
  ARM: dts: rockchip: enable the high speed on sdio for kylin board
  ARM: dts: rockchip: add the wifi/bt regulator for kylin board
  ARM: dts: rockchip: enable the uart0 for kylin board
  ARM: dts: rockchip: add the sdmmc for kylin board
  ARM: dts: rockchip: add the lcdc and hdmi node for rk3036
  ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs

 .../devicetree/bindings/mmc/mmc-pwrseq-simple.txt  |   9 ++
 arch/arm/boot/dts/rk3036-kylin.dts                 | 119 +++++++++++++++++++++
 arch/arm/boot/dts/rk3036.dtsi                      |  74 +++++++++++--
 drivers/clk/rockchip/clk-rk3036.c                  |   2 +-
 drivers/mmc/core/pwrseq_simple.c                   |  16 +++
 5 files changed, 213 insertions(+), 7 deletions(-)

-- 
1.9.1

[PATCH v2 01/12] ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s

[Caesar Wang]

Sometime will hang if you set the i2s pinctrl as the none setting.
Let's set the pinctrl as the default setting to enable the gpio up/down.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- modify the commit.

 arch/arm/boot/dts/rk3036.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index b9567c1..8f1bb0f 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -579,12 +579,12 @@
 
 		i2s {
 			i2s_bus: i2s-bus {
-				rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_none>,
-						<1 1 RK_FUNC_1 &pcfg_pull_none>,
-						<1 2 RK_FUNC_1 &pcfg_pull_none>,
-						<1 3 RK_FUNC_1 &pcfg_pull_none>,
-						<1 4 RK_FUNC_1 &pcfg_pull_none>,
-						<1 5 RK_FUNC_1 &pcfg_pull_none>;
+				rockchip,pins = <1 0 RK_FUNC_1 &pcfg_pull_default>,
+						<1 1 RK_FUNC_1 &pcfg_pull_default>,
+						<1 2 RK_FUNC_1 &pcfg_pull_default>,
+						<1 3 RK_FUNC_1 &pcfg_pull_default>,
+						<1 4 RK_FUNC_1 &pcfg_pull_default>,
+						<1 5 RK_FUNC_1 &pcfg_pull_default>;
 			};
 		};
 
-- 
1.9.1

[PATCH v2 02/12] ARM: dts: rockchip: add the sound codec for kylin board

[Caesar Wang]

Support the rt5616 codec for kylin board, but we need
enable the i2s firstly.
Also, this patch adds the CPU/CODEC information for simple card
to make the happy work.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- fix the mclk-fs as the 256.

 arch/arm/boot/dts/rk3036-kylin.dts | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index 992f9ca..27b6326 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -46,6 +46,28 @@
 	model = "Rockchip RK3036 KylinBoard";
 	compatible = "rockchip,rk3036-kylin", "rockchip,rk3036";
 
+	sound {
+		compatible = "simple-audio-card";
+		simple-audio-card,format = "i2s";
+		simple-audio-card,name = "rockchip,rt5616-codec";
+		simple-audio-card,mclk-fs = <256>;
+		simple-audio-card,widgets =
+			"Microphone", "Microphone Jack",
+			"Headphone", "Headphone Jack";
+		simple-audio-card,routing =
+			"MIC1", "Microphone Jack",
+			"MIC2", "Microphone Jack",
+			"Microphone Jack", "micbias1",
+			"Headphone Jack", "HPOL",
+			"Headphone Jack", "HPOR";
+		simple-audio-card,cpu {
+			sound-dai = <&i2s>;
+		};
+		simple-audio-card,codec {
+			sound-dai = <&rt5616>;
+		};
+	};
+
 	vcc_sys: vsys-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vcc_sys";
@@ -257,6 +279,17 @@
 
 &i2c2 {
 	status = "okay";
+
+	rt5616: rt5616@1b {
+		#sound-dai-cells = <0>;
+		compatible = "rt5616";
+		reg = <0x1b>;
+	};
+};
+
+&i2s {
+	#sound-dai-cells = <0>;
+	status = "okay";
 };
 
 &sdio {
-- 
1.9.1

[PATCH v2 03/12] ARM: dts: rockchip: override the clocks in i2s for kylin board

[Caesar Wang]

The sysclk seems be incorrect since we use the simple card for kylin
board.

The simple card call:

asoc_simple_card_probe ->
 asoc_simple_card_dai_link_of ->
  asoc_simple_card_sub_parse_of ->
...
clk = of_clk_get(args.np, 0);
if (!IS_ERR(clk))
dai->sysclk = clk_get_rate(clk);

The sysclk come from the first clock, then first clock is hclk_i2s
in i2s for rk3036 dtsi.
So, we can override the clocks to fit the simple card in here.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None

 arch/arm/boot/dts/rk3036-kylin.dts | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index 27b6326..b642369 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -288,6 +288,13 @@
 };
 
 &i2s {
+	/**
+	 * We should override the clocks since sysclk from the first clock
+	 * in simple card.
+	 */
+	clock-names = "i2s_clk", "i2s_hclk";
+	clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
+
 	#sound-dai-cells = <0>;
 	status = "okay";
 };
-- 
1.9.1

[PATCH v2 04/12] clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out

[Caesar Wang]

SCLk_I2S_OUT is the noc bus clock for i2s module, this clock is used by
extra codecs.

Due to it shouldn't belong to any driver, but we need it enabled,
so just mark it as the CLK_IGNORE_UNUSED flag.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None

 drivers/clk/rockchip/clk-rk3036.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/rockchip/clk-rk3036.c b/drivers/clk/rockchip/clk-rk3036.c
index 34c78f4..c33ed3c 100644
--- a/drivers/clk/rockchip/clk-rk3036.c
+++ b/drivers/clk/rockchip/clk-rk3036.c
@@ -310,7 +310,7 @@ static struct rockchip_clk_branch rk3036_clk_branches[] __initdata = {
 			RK2928_CLKSEL_CON(7), 0,
 			RK2928_CLKGATE_CON(0), 10, GFLAGS,
 			&rk3036_i2s_fracmux),
-	COMPOSITE_NODIV(SCLK_I2S_OUT, "i2s_clkout", mux_i2s_clkout_p, 0,
+	COMPOSITE_NODIV(SCLK_I2S_OUT, "i2s_clkout", mux_i2s_clkout_p, CLK_IGNORE_UNUSED,
 			RK2928_CLKSEL_CON(3), 12, 1, MFLAGS,
 			RK2928_CLKGATE_CON(0), 13, GFLAGS),
 	GATE(SCLK_I2S, "sclk_i2s", "i2s_pre", CLK_SET_RATE_PARENT,
-- 
1.9.1

[PATCH v2 05/12] mmc: pwrseq: Document optional exteral vcc for the simple power sequence

[Caesar Wang]

This patch adds the exteral vcc optional for the simple power sequence.

Some WLAN chips attached to a SDIO interface, need an external vcc
to be operational. Since this is very common, extend the simple MMC
power sequence DT binding to support an optional exteral vcc.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None

 Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt
index ce0e767..fdcc6a1 100644
--- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.txt
@@ -12,6 +12,7 @@ Optional properties:
 	at initialization and prior we start the power up procedure of the card.
 	They will be de-asserted right after the power has been provided to the
 	card.
+- ext-vcc-supply : Regulator to drive (independent) card VCC.
 - clocks : Must contain an entry for the entry in clock-names.
   See ../clocks/clock-bindings.txt for details.
 - clock-names : Must include the following entry:
@@ -19,9 +20,17 @@ Optional properties:
 
 Example:
 
+	wifi_regulator: wifi-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		regulator-name = "wifi_regulator";
+	};
+
 	sdhci0_pwrseq {
 		compatible = "mmc-pwrseq-simple";
 		reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+		ext-vcc-supply = <&wifi_regulator>;
 		clocks = <&clk_32768_ck>;
 		clock-names = "ext_clock";
 	}
-- 
1.9.1

[PATCH v2 06/12] mmc: pwrseq: add support for power-on sequencing through DT

[Caesar Wang]

This patch enables support for power-on sequencing of SDIO
peripherals through DT.

In general, it's quite common that wifi modules and other similar
peripherals have several signals in addition to the SDIO interface that
needs wiggling before the module will power on.

For example:
we need enable wifi module power to via the WL_REG_ON
pin, we need enable it as the regulator if this pin is connected to
the gpio of cpu.

Maybe, someone will say that can pull up/down from dts.
Unfortunately some SoCs can't support pinctrl pull up/down in
internal.

Anyway, we can add this patch to supprt the power-on sequencing for
sdio.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- This fix inmmc-power-sequences, as Heiko comment on
  https://patchwork.kernel.org/patch/7903161/

 drivers/mmc/core/pwrseq_simple.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c
index d10538b..455dd0c 100644
--- a/drivers/mmc/core/pwrseq_simple.c
+++ b/drivers/mmc/core/pwrseq_simple.c
@@ -14,6 +14,7 @@
 #include <linux/err.h>
 #include <linux/of_gpio.h>
 #include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
 
 #include <linux/mmc/host.h>
 
@@ -24,6 +25,7 @@ struct mmc_pwrseq_simple {
 	bool clk_enabled;
 	struct clk *ext_clk;
 	struct gpio_descs *reset_gpios;
+	struct regulator *regulator;
 };
 
 static void mmc_pwrseq_simple_set_gpios_value(struct mmc_pwrseq_simple *pwrseq,
@@ -45,6 +47,13 @@ static void mmc_pwrseq_simple_pre_power_on(struct mmc_host *host)
 	struct mmc_pwrseq_simple *pwrseq = container_of(host->pwrseq,
 					struct mmc_pwrseq_simple, pwrseq);
 
+	if (!IS_ERR(pwrseq->regulator)) {
+		dev_dbg(host->parent, "Enabling external regulator\n");
+		if (regulator_enable(pwrseq->regulator))
+			dev_err(host->parent,
+				"Failed to enable external regulator\n");
+	}
+
 	if (!IS_ERR(pwrseq->ext_clk) && !pwrseq->clk_enabled) {
 		clk_prepare_enable(pwrseq->ext_clk);
 		pwrseq->clk_enabled = true;
@@ -117,6 +126,13 @@ struct mmc_pwrseq *mmc_pwrseq_simple_alloc(struct mmc_host *host,
 		goto clk_put;
 	}
 
+	pwrseq->regulator = devm_regulator_get(dev, "ext-vcc");
+	if (IS_ERR(pwrseq->regulator) &&
+	    PTR_ERR(pwrseq->regulator) != -EPROBE_DEFER) {
+		ret = PTR_ERR(pwrseq->regulator);
+		goto clk_put;
+	}
+
 	pwrseq->pwrseq.ops = &mmc_pwrseq_simple_ops;
 
 	return &pwrseq->pwrseq;
-- 
1.9.1

[PATCH v2 07/12] ARM: dts: rockchip: enable the high speed on sdio for kylin board

[Caesar Wang]

We want to the higher speed for wifi module working.

Bootup kernel log:
...
mmc_host mmc0: Bus speed (slot 0) = 37125000Hz (slot req 37500000Hz,
actual 37125000HZ div = 0)

or run 'cat /sys/kernel/debug/clk/clk_summary |grep phase -C 1' to check
Otherwise, the mmc0 will run 400khz defalult value to work.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None

 arch/arm/boot/dts/rk3036-kylin.dts | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index b642369..b2e5f5d 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -304,6 +304,11 @@
 
 	broken-cd;
 	bus-width = <4>;
+	cap-sd-highspeed;
+	sd-uhs-sdr12;
+	sd-uhs-sdr25;
+	sd-uhs-sdr50;
+	sd-uhs-sdr104;
 	cap-sdio-irq;
 	default-sample-phase = <90>;
 	keep-power-in-suspend;
-- 
1.9.1

[PATCH v2 08/12] ARM: dts: rockchip: add the wifi/bt regulator for kylin board

[Caesar Wang]

This patch adds the wifi/bt regulator for simple mmc sequence.
Also, add the exteral clock and reset gpios for simple mmmc sequence
on kylin board.

Without this the wifi/bluetooth module doesn't work properly at bootup.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- As Heiko comment, modify it to fit the simple-mmc-sequence.

 arch/arm/boot/dts/rk3036-kylin.dts | 53 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 53 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index b2e5f5d..4346ce5 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -40,6 +40,7 @@
 
 /dts-v1/;
 
+#include <dt-bindings/clock/rockchip,rk808.h>
 #include "rk3036.dtsi"
 
 / {
@@ -76,6 +77,43 @@
 		regulator-always-on;
 		regulator-boot-on;
 	};
+
+	bt_regulator: bt-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_enable_l>;
+		regulator-name = "bt_regulator";
+	};
+
+	wifi_regulator: wifi-regulator {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&wifi_enable_h>;
+		regulator-name = "wifi_regulator";
+		vin-supply = <&bt_regulator>;
+	};
+
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&rk808 RK808_CLKOUT1>;
+		clock-names = "ext_clock";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_wake_h>;
+
+		/*
+		 * On the module itself this is one of these (depending
+		 * on the actual card populated):
+		 * - SDIO_RESET_L_WL_REG_ON
+		 * - PDN (power down when low)
+		 */
+		reset-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
+		ext-vcc-supply = <&wifi_regulator>;
+	};
+
 };
 
 &acodec {
@@ -312,6 +350,7 @@
 	cap-sdio-irq;
 	default-sample-phase = <90>;
 	keep-power-in-suspend;
+	mmc-pwrseq = <&sdio_pwrseq>;
 	non-removable;
 	num-slots = <1>;
 	pinctrl-names = "default";
@@ -337,6 +376,20 @@
 		};
 	};
 
+	sdio {
+		wifi_enable_h: wifienable-h {
+			rockchip,pins = <0 26 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_enable_l: bt-enable-l {
+			rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+
+		bt_wake_h: bt-wake-h {
+			rockchip,pins = <2 8 RK_FUNC_GPIO &pcfg_pull_default>;
+		};
+	};
+
 	sleep {
 		global_pwroff: global-pwroff {
 			rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;
-- 
1.9.1

[PATCH v2 09/12] ARM: dts: rockchip: enable the uart0 for kylin board

[Caesar Wang]

This patch is enabling the uart0 for bluetooth module.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2:
- Add the uart0 commit content.

 arch/arm/boot/dts/rk3036-kylin.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index 4346ce5..c5e46f9 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -361,6 +361,10 @@
 	status = "okay";
 };
 
+&uart0 {
+	status = "okay";
+};
+
 &usb_host {
 	status = "okay";
 };
-- 
1.9.1

[PATCH v2 10/12] ARM: dts: rockchip: add the sdmmc for kylin board

[Caesar Wang]

We should add the sdmmc but enabling it, since the sdmmc and
uart2 ie reusing the same pin.
That will cause the debug information can't display on console.

Anyway, you only need add the okay status if someone wants to enable
the sdmmc.

e.g.
if you use the adb to debug and run with android os.
you can add the
status = "okay" to enable the sdmmc for sd card working.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None

 arch/arm/boot/dts/rk3036-kylin.dts | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036-kylin.dts b/arch/arm/boot/dts/rk3036-kylin.dts
index c5e46f9..2dbc7bb 100644
--- a/arch/arm/boot/dts/rk3036-kylin.dts
+++ b/arch/arm/boot/dts/rk3036-kylin.dts
@@ -357,6 +357,17 @@
 	pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
 };
 
+&sdmmc {
+	bus-width = <4>;
+	cap-mmc-highspeed;
+	cap-sd-highspeed;
+	card-detect-delay = <200>;
+	disable-wp;
+	num-slots = <1>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc_clk>, <&sdmmc_cmd>, <&sdmmc_cd>, <&sdmmc_bus4>;
+};
+
 &uart2 {
 	status = "okay";
 };
@@ -394,6 +405,12 @@
 		};
 	};
 
+	sdmmc {
+		sdmmc_pwr: sdmmc-pwr {
+			rockchip,pins = <2 28 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	sleep {
 		global_pwroff: global-pwroff {
 			rockchip,pins = <2 7 RK_FUNC_1 &pcfg_pull_none>;
-- 
1.9.1

[PATCH v2 11/12] ARM: dts: rockchip: add the lcdc and hdmi node for rk3036

[Caesar Wang]

The rk3036 support two overlay plane and one hwc plane,
it support IOMMU, and its IOMMU same as rk3288's.

Meanwhile, add the inno hdmi for HDMI display.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>

---

Changes in v2: None

 arch/arm/boot/dts/rk3036.dtsi | 61 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 61 insertions(+)

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 8f1bb0f..6ff03e3 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -147,6 +147,37 @@
 		};
 	};
 
+	lcdc_mmu: iommu@10118300 {
+		compatible = "rockchip,iommu";
+		reg = <0x10118300 0x100>;
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "lcdc_mmu";
+		#iommu-cells = <0>;
+		status = "disabled";
+	};
+
+	lcdc: lcdc@10118000 {
+		compatible = "rockchip,rk3036-lcdc";
+		reg = <0x10118000 0x19c>;
+		interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru ACLK_LCDC>, <&cru SCLK_LCDC>, <&cru HCLK_LCDC>;
+		clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
+		resets = <&cru SRST_LCDC1_A>, <&cru SRST_LCDC1_H>, <&cru SRST_LCDC1_D>;
+		reset-names = "axi", "ahb", "dclk";
+		iommus = <&lcdc_mmu>;
+
+		status = "disabled";
+
+		lcdc_out: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			lcdc_out_hdmi: endpoint@0 {
+				reg = <1>;
+				remote-endpoint = <&hdmi_in_lcdc>;
+			};
+		};
+	};
+
 	gic: interrupt-controller@10139000 {
 		compatible = "arm,gic-400";
 		interrupt-controller;
@@ -274,6 +305,27 @@
 		status = "disabled";
 	};
 
+	hdmi: hdmi@20034000 {
+		compatible = "rockchip,rk3036-inno-hdmi";
+		reg = <0x20034000 0x4000>;
+		interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru  PCLK_HDMI>;
+		clock-names = "pclk";
+		rockchip,grf = <&grf>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&hdmi_ctl>;
+		status = "disabled";
+
+		hdmi_in: port {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			hdmi_in_lcdc: endpoint@0 {
+				reg = <0>;
+				remote-endpoint = <&lcdc_out_hdmi>;
+			};
+		};
+	};
+
 	timer: timer@20044000 {
 		compatible = "rockchip,rk3036-timer", "rockchip,rk3288-timer";
 		reg = <0x20044000 0x20>;
@@ -556,6 +608,15 @@
 			};
 		};
 
+		hdmi {
+			hdmi_ctl: hdmi-ctl {
+				rockchip,pins = <1 8  RK_FUNC_1 &pcfg_pull_none>,
+						<1 9  RK_FUNC_1 &pcfg_pull_none>,
+						<1 10 RK_FUNC_1 &pcfg_pull_none>,
+						<1 11 RK_FUNC_1 &pcfg_pull_none>;
+			};
+		};
+
 		i2c0 {
 			i2c0_xfer: i2c0-xfer {
 				rockchip,pins = <0 0 RK_FUNC_1 &pcfg_pull_none>,
-- 
1.9.1

[PATCH v2 12/12] ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs

[Caesar Wang]

Pl330 integrated in rk3036platform doesn't support
DMAFLUSHP function. So we add arm,pl330-broken-no-flushp quirk
for it.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v2: None

 arch/arm/boot/dts/rk3036.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 6ff03e3..0168817 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -102,6 +102,7 @@
 		pdma: pdma@20078000 {
 			compatible = "arm,pl330", "arm,primecell";
 			reg = <0x20078000 0x4000>;
+			arm,pl330-broken-no-flushp;
 			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 			#dma-cells = <1>;
-- 
1.9.1

Re: [PATCH v2 04/12] clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out

[Heiko Stuebner]

Hi Caesar,

Am Donnerstag, 7. Januar 2016, 16:25:47 schrieb Caesar Wang:
> SCLk_I2S_OUT is the noc bus clock for i2s module, this clock is used by
> extra codecs.
> 
> Due to it shouldn't belong to any driver, but we need it enabled,
> so just mark it as the CLK_IGNORE_UNUSED flag.

What makes you think it shouldn't belong to any driver?

In most schematics I have, i2s_clkout is going to some clock-input of the 
audio codec - probably the MCLK input on your rt5616. And while the new 
rt5616 driver does not seem to do clock handling, it should just handle the 
clock using the normal APIs.


Heiko

Re: [PATCH v2 00/12] Add the family patches to support for kylin board

[Heiko Stuebner]

Hi Caesar,

Am Donnerstag, 7. Januar 2016, 16:25:43 schrieb Caesar Wang:
> Hi all,
> 
> Happy new year! :)
> Let's go on working for happy.

please make sure to split your patch-series at appropriate points for future 
versions to only address relevant people. For example I don't think Ulf 
really cares about getting the audio-related or general devicetree patches.


Heiko

> This series patches are based on kernel version 4.4.0-rc8+
> (Linux version 4.4.0-rc8+ (wxt@ubuntu)...#142 SMP Thu Jan 7 12:38:40 CST
> 2016)
> 
> This series pacthes are verified on the following github:
> https://github.com/Caesar-github/rockchip/commits/kylin-develop4.4
> 
> This series has 12 patches: (12--->1)
> bbd1a01 ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs
> fb8c1fd ARM: dts: rockchip: add the lcdc and hdmi node for rk3036
> 1aeb49d ARM: dts: rockchip: add the sdmmc for kylin board
> 3e19128 ARM: dts: rockchip: enable the uart0 for kylin board
> e7de154 ARM: dts: rockchip: add the wifi/bt regulator for kylin board
> 8699698 ARM: dts: rockchip: enable the high speed on sdio for kylin board
> 21eded4 mmc: pwrseq: add support for power-on sequencing through DT
> cdf3a7e mmc: pwrseq: Document optional exteral vcc for the simple power
> sequence 131c249 clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag
> for sclk_i2s_out b7ff8e1 ARM: dts: rockchip: override the clocks in i2s
> for kylin board 5f56af4 ARM: dts: rockchip: add the sound codec for kylin
> board
> 914d9c0 ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
> ..
> 
> This series patches have the following decriptions:
> 
> PATCH[1/12-4/12]:====> Support rt5616 codec for kylin board
> 914d9c0 ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
> 5f56af4 ARM: dts: rockchip: add the sound codec for kylin board
> b7ff8e1 ARM: dts: rockchip: override the clocks in i2s for kylin board
> 131c249 clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for
> sclk_i2s_out
> 
> This patches is working for codec rt5616 on kylin board. (RK3036 SoCs)
> 
> That's needed the following rt5616 driver from Mark Brown Branch.
> (cherry picked from git.kernel.org broonie/sound.git for-next)
> 
> cf94b7a UPSTREAM: ASoC: rt5616: rename some alsa control names
> 86f561d UPSTREAM: ASoC: rt5616: add devicetree document for rt5616
> 0e0f5f8 UPSTREAM: ASoC: rt5616: add an of_match table
> 263a330 UPSTREAM: ASoC: rt5616: Return error if device ID mismatch
> 0094139 UPSTREAM: ASoC: rt5616: add rt5616 codec driver
> 
> Notes:
> I'm run it with the ubuntu 15.04 to set the configure.
> ./amixer "HP Playback Switch" 1
> ./amixer "HP Playback Volume" 20
> ./amixer "HPO MIX DAC1 Switch" 1
> ./amixer "OUT MIXR DAC R1 Switch" 1
> ./amixer "OUT MIXL DAC L1 Switch" 1
> ./amixer "Stereo DAC MIXR DAC R1 Switch" 1
> ./amixer "Stereo DAC MIXL DAC L1 Switch" 1
> 
> root@linaro-alip:/media/aplay# ./aplay pcm.wav
> Playing sample: 2 ch, 48000 hz, 16 bit
> ..
> That can be normal playing the music.
> ----
> 
> PATCH[5/12-9/12]: ====> Support wifi/bt module for kylin board
> cdf3a7e mmc: pwrseq: Document optional exteral vcc for the simple power
> sequence 21eded4 mmc: pwrseq: add support for power-on sequencing through
> DT 8699698 ARM: dts: rockchip: enable the high speed on sdio for kylin
> board e7de154 ARM: dts: rockchip: add the wifi/bt regulator for kylin
> board 3e19128 ARM: dts: rockchip: enable the uart0 for kylin board
> 
> The wifi/bt driver hasn't land in mainline, the driver is in here:
> https://github.com/Caesar-github/rockchip/commit/1912ef4c0e358677904b0a0bb
> b83f9745066f0ec
> 
> wpa_supplicant -Dnl80211 -c /etc/wifi/wpa_supplicant.conf -i wlan0 -B
> wpa_cli add_network
> wpa_cli set_network 1 ssid \"wxt\"
> wpa_cli set_network 1 psk \"123456789\"
> wpa_cli select_network 1
> wpa_cli save_config
> 
> ifconfig wlan0 192.168.1.105
> route add default gw 192.168.1.1
> 
> root@linaro-alip:/# ping 192.168.1.1
> PING 192.168.1.1 (192.168.1.1) 56(84) bytes of data.
> 64 bytes from 192.168.1.1: icmp_seq=1 ttl=64 time=6.83 ms
> 64 bytes from 192.168.1.1: icmp_seq=2 ttl=64 time=184 ms
> 64 bytes from 192.168.1.1: icmp_seq=3 ttl=64 time=9.21 ms
> 64 bytes from 192.168.1.1: icmp_seq=4 ttl=64 time=6.84 ms
> 64 bytes from 192.168.1.1: icmp_seq=5 ttl=64 time=11.2 ms
> 64 bytes from 192.168.1.1: icmp_seq=6 ttl=64 time=9.24 ms
> 64 bytes from 192.168.1.1: icmp_seq=7 ttl=64 time=12.9 ms
> 64 bytes from 192.168.1.1: icmp_seq=8 ttl=64 time=7.02 ms
> 64 bytes from 192.168.1.1: icmp_seq=9 ttl=64 time=24.3 ms
> 64 bytes from 192.168.1.1: icmp_seq=10 ttl=64 time=13.6 ms
> 64 bytes from 192.168.1.1: icmp_seq=11 ttl=64 time=3.87 m
> ...
> 
> The wifi throughput:
> 
> iperf -s -i 1
> ...
> [  4] 116.0-117.0 sec  2.88 MBytes  24.1 Mbits/sec
> [  4] 117.0-118.0 sec  2.99 MBytes  25.0 Mbits/sec
> [  4] 118.0-119.0 sec  3.01 MBytes  25.2 Mbits/sec
> [  4] 119.0-120.0 sec  2.89 MBytes  24.2 Mbits/sec
> [  4]  0.0-120.4 sec   332 MBytes  23.1 Mbits/sec
> ----
> 
> PATCH[10/12]: ====> sdmmc patch for kylin board
> ARM: dts: rockchip: add the sdmmc for kylin board
> 
> You should mark it "oaky" if you want to use the sdmmc.
> This patch default is disabing the sdmmc since the sdmmc and
> uart2(debug port) is reusing pin.
> ----
> 
> PATCH[11/12]: ====> hdmi/lcdc diaply patch for rk3036 dts
> ARM: dts: rockchip: add the lcdc and hdmi node for rk3036
> 
> We can add this patch to support it since the Mark Yao has land
> your vop support.
> https://github.com/markyzq/kernel-drm-rockchip/commits/drm-rockchip-next-2
> 015-12-28 ----
> 
> PATCH[12/12]:====> DMA Patchs
> ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs
> 
> In order to be better read/write for emmc.
> This patch is based on the following:(Fix broken DMAFLUSHP on Rockchips
> platform)
> 
> 3055695 FROMLIST: DMA: dmaengine: expose max burst capability to clientmZ
> (am from https://patchwork.kernel.org/patch/7399361/)
> ed56bee FROMLIST: DMA: pl330: add quirk for broken no flushp
> (am from https://patchwork.kernel.org/patch/7399371/)
> 0c43bc3 FROMLIST: Documentation: arm-pl330: add description of arm,
> pl330-broken-no-flushp (am from
> https://patchwork.kernel.org/patch/7399371/)
> 623a699 FROMLIST: DMA: pl330: support burst mode for dev-to-mem and
> mem-to-dev transmit (am from https://patchwork.kernel.org/patch/7399381/)
> ----
> 
> 
> Changes in v2:
> - modify the commit.
> - fix the mclk-fs as the 256.
> - This fix inmmc-power-sequences, as Heiko comment on
>   https://patchwork.kernel.org/patch/7903161/
> - As Heiko comment, modify it to fit the simple-mmc-sequence.
> - Add the uart0 commit content.
> 
> Caesar Wang (12):
>   ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s
>   ARM: dts: rockchip: add the sound codec for kylin board
>   ARM: dts: rockchip: override the clocks in i2s for kylin board
>   clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for
>     sclk_i2s_out
>   mmc: pwrseq: Document optional exteral vcc for the simple power
>     sequence
>   mmc: pwrseq: add support for power-on sequencing through DT
>   ARM: dts: rockchip: enable the high speed on sdio for kylin board
>   ARM: dts: rockchip: add the wifi/bt regulator for kylin board
>   ARM: dts: rockchip: enable the uart0 for kylin board
>   ARM: dts: rockchip: add the sdmmc for kylin board
>   ARM: dts: rockchip: add the lcdc and hdmi node for rk3036
>   ARM: dts: Add pl330-broken-no-flushp quirk for rk3036 SoCs
> 
>  .../devicetree/bindings/mmc/mmc-pwrseq-simple.txt  |   9 ++
>  arch/arm/boot/dts/rk3036-kylin.dts                 | 119
> +++++++++++++++++++++ arch/arm/boot/dts/rk3036.dtsi                     
> |  74 +++++++++++-- drivers/clk/rockchip/clk-rk3036.c                  | 
>  2 +-
>  drivers/mmc/core/pwrseq_simple.c                   |  16 +++
>  5 files changed, 213 insertions(+), 7 deletions(-)

Re: [PATCH v2 04/12] clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out

[Caesar Wang]

Heiko,

在 2016年01月07日 18:05, Heiko Stuebner 写道:
> Hi Caesar,
>
> Am Donnerstag, 7. Januar 2016, 16:25:47 schrieb Caesar Wang:
>> SCLk_I2S_OUT is the noc bus clock for i2s module, this clock is used by
>> extra codecs.
>>
>> Due to it shouldn't belong to any driver, but we need it enabled,
>> so just mark it as the CLK_IGNORE_UNUSED flag.
> What makes you think it shouldn't belong to any driver?
>
> In most schematics I have, i2s_clkout is going to some clock-input of the
> audio codec - probably the MCLK input on your rt5616. And while the new
> rt5616 driver does not seem to do clock handling, it should just handle the
> clock using the normal APIs.

You are right,  that's seem has to find the root cause.
I'm wonder that the codec/i2s is working in kernel v4.1 patch without it.

In general,  the MLCK will be handled in i2s driver if the cpu side is 
master.

>
>
> Heiko
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip


-- 
Thanks,
Caesar

Re: [PATCH v2 04/12] clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out

[Heiko Stuebner]

Hi Caesar,

Am Freitag, 8. Januar 2016, 17:26:18 schrieb Caesar Wang:
> 在 2016年01月07日 18:05, Heiko Stuebner 写道:
> > Am Donnerstag, 7. Januar 2016, 16:25:47 schrieb Caesar Wang:
> >> SCLk_I2S_OUT is the noc bus clock for i2s module, this clock is used by
> >> extra codecs.
> >> 
> >> Due to it shouldn't belong to any driver, but we need it enabled,
> >> so just mark it as the CLK_IGNORE_UNUSED flag.
> > 
> > What makes you think it shouldn't belong to any driver?
> > 
> > In most schematics I have, i2s_clkout is going to some clock-input of
> > the
> > audio codec - probably the MCLK input on your rt5616. And while the new
> > rt5616 driver does not seem to do clock handling, it should just handle
> > the clock using the normal APIs.
> 
> You are right,  that's seem has to find the root cause.
> I'm wonder that the codec/i2s is working in kernel v4.1 patch without it.
> 
> In general,  the MLCK will be handled in i2s driver if the cpu side is
> master.

looking at the rt5616 datasheet, that would be BCLK1 instead I think. This 
one does differentiate between being master/slave.

The master/sysclk (mclk) is also handled in other drivers in all cases. 
(da7213.c, da7219.c, max98090.c, max98095.c, probably more)


Heiko

Re: [PATCH v2 05/12] mmc: pwrseq: Document optional exteral vcc for the simple power sequence

[Javier Martinez Canillas]

Hello Caesar,

On 01/07/2016 05:25 AM, Caesar Wang wrote:
> This patch adds the exteral vcc optional for the simple power sequence.
> 
> Some WLAN chips attached to a SDIO interface, need an external vcc
> to be operational. Since this is very common, extend the simple MMC
> power sequence DT binding to support an optional exteral vcc.
> 

s/exteral/external in the subject line and other places.

I think that makes sense to extend the simple power sequence provider
to add a regulator since many SDIO chips may needed it but it seems
from the commit message of patch 06/12 that you don't actually need
a regulator but to toggle a WL_REG_ON pin in your WiFi chip.

I'll answer to that patch though.

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

Re: [PATCH v2 06/12] mmc: pwrseq: add support for power-on sequencing through DT

[Javier Martinez Canillas]

Hello Caesar,

On 01/07/2016 05:25 AM, Caesar Wang wrote:
> This patch enables support for power-on sequencing of SDIO
> peripherals through DT.
>

I think the subject line and this first paragraph are misleading since
the simple power sequence provider already supports power-on sequencing.

This patch does not add or enable support but extends the current support
to also enable a regulator as a part of the SDIO chip power on sequencing.
 
> In general, it's quite common that wifi modules and other similar
> peripherals have several signals in addition to the SDIO interface that
> needs wiggling before the module will power on.
> 
> For example:
> we need enable wifi module power to via the WL_REG_ON
> pin, we need enable it as the regulator if this pin is connected to
> the gpio of cpu.
>

This part confuses me, so does your chip have an actual regulator that
needs to be enabled or is just a fake regulator whose gpio property is
used not to enable the regulator but to toggle the WL_REG_ON pin of
the WiFi chip?
 
> Maybe, someone will say that can pull up/down from dts.
> Unfortunately some SoCs can't support pinctrl pull up/down in
> internal.
>

Can you please elaborate on this? AFAIU this limitation is the reason
why you went with the regulator approach so I think it deserve a more
deep explanation.
 
> Anyway, we can add this patch to supprt the power-on sequencing for

s/supprt/support

> sdio.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

Re: [PATCH v2 01/12] ARM: dts: rockchip: set the pinctrl default setting for rk3036 i2s

[Heiko Stuebner]

Am Donnerstag, 7. Januar 2016, 16:25:44 schrieb Caesar Wang:
> Sometime will hang if you set the i2s pinctrl as the none setting.
> Let's set the pinctrl as the default setting to enable the gpio up/down.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

applied to my dts branch for 4.6

Re: [PATCH v2 03/12] ARM: dts: rockchip: override the clocks in i2s for kylin board

[Heiko Stuebner]

Hi Caesar,

Am Donnerstag, 7. Januar 2016, 16:25:46 schrieb Caesar Wang:
> The sysclk seems be incorrect since we use the simple card for kylin
> board.
> 
> The simple card call:
> 
> asoc_simple_card_probe ->
>  asoc_simple_card_dai_link_of ->
>   asoc_simple_card_sub_parse_of ->
> ...
> clk = of_clk_get(args.np, 0);
> if (!IS_ERR(clk))
> dai->sysclk = clk_get_rate(clk);
> 
> The sysclk come from the first clock, then first clock is hclk_i2s
> in i2s for rk3036 dtsi.
> So, we can override the clocks to fit the simple card in here.

It's not that effective, doing that change on a per-board level - as it
would possibly need to be repeated for future boards.
The i2s driver doesn't care, as it uses named clocks, so I instead did
the swap in the rk3036.dtsi for all boards. Can you check if that is ok
for you or if I did overlook something?


Thanks
Heiko

------- 8< -------
Subject: [PATCH] ARM: dts: rockchip: swap i2s clock ordering on rk3036

For sound setups using the simple-card mechanism, the main clock
(sysclk) is expected to be the first element. For the i2s-driver
itself it doesn't matter, as it uses named clocks, so we can just
swap them.

Reported-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 arch/arm/boot/dts/rk3036.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
index 8f1bb0f..ee457a2 100644
--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -241,8 +241,8 @@
 		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		clock-names = "i2s_hclk", "i2s_clk";
-		clocks = <&cru HCLK_I2S>, <&cru SCLK_I2S>;
+		clock-names = "i2s_clk", "i2s_hclk";
+		clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
 		dmas = <&pdma 0>, <&pdma 1>;
 		dma-names = "tx", "rx";
 		pinctrl-names = "default";
-- 
2.6.4

Re: [PATCH v2 02/12] ARM: dts: rockchip: add the sound codec for kylin board

[Heiko Stuebner]

Am Donnerstag, 7. Januar 2016, 16:25:45 schrieb Caesar Wang:
> Support the rt5616 codec for kylin board, but we need
> enable the i2s firstly.
> Also, this patch adds the CPU/CODEC information for simple card
> to make the happy work.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>

applied to my dts branch for 4.6.

I've adapted the commit message, to make it a bit more clear. [0]


Thanks
Heiko

[0] https://git.kernel.org/cgit/linux/kernel/git/mmind/linux-rockchip.git/commit/?h=v4.6-armsoc/dts32&id=1a21fe2a6f00226d126cd4ba4ac2484208c58b71

Re: [PATCH v2 06/12] mmc: pwrseq: add support for power-on sequencing through DT

[Heiko Stuebner]

Am Freitag, 8. Januar 2016, 09:22:31 schrieb Javier Martinez Canillas:
> > For example:
> > we need enable wifi module power to via the WL_REG_ON
> > pin, we need enable it as the regulator if this pin is connected to
> > the gpio of cpu.
> 
> This part confuses me, so does your chip have an actual regulator that
> needs to be enabled or is just a fake regulator whose gpio property is
> used not to enable the regulator but to toggle the WL_REG_ON pin of
> the WiFi chip?

another option would be to use the reset-gpio-handles. rk3288-veyron and I 
think some Exynos as well use it that way.


> > Maybe, someone will say that can pull up/down from dts.
> > Unfortunately some SoCs can't support pinctrl pull up/down in
> > internal.
> 
> Can you please elaborate on this? AFAIU this limitation is the reason
> why you went with the regulator approach so I think it deserve a more
> deep explanation.

On the rk3036 each pin has an individual unchangable pull direction. So it's 
either no bias or pulling in the predefined direction (the pin_default bias 
option).


Heiko

Re: [PATCH v2 03/12] ARM: dts: rockchip: override the clocks in i2s for kylin board

[Caesar Wang]

Heiko,

在 2016年01月09日 10:31, Heiko Stuebner 写道:
> Hi Caesar,
>
> Am Donnerstag, 7. Januar 2016, 16:25:46 schrieb Caesar Wang:
>> The sysclk seems be incorrect since we use the simple card for kylin
>> board.
>>
>> The simple card call:
>>
>> asoc_simple_card_probe ->
>>   asoc_simple_card_dai_link_of ->
>>    asoc_simple_card_sub_parse_of ->
>> ...
>> clk = of_clk_get(args.np, 0);
>> if (!IS_ERR(clk))
>> dai->sysclk = clk_get_rate(clk);
>>
>> The sysclk come from the first clock, then first clock is hclk_i2s
>> in i2s for rk3036 dtsi.
>> So, we can override the clocks to fit the simple card in here.
> It's not that effective, doing that change on a per-board level - as it
> would possibly need to be repeated for future boards.
> The i2s driver doesn't care, as it uses named clocks, so I instead did
> the swap in the rk3036.dtsi for all boards. Can you check if that is ok
> for you or if I did overlook something?

That's okay for me.

>
> Thanks
> Heiko
>
> ------- 8< -------
> Subject: [PATCH] ARM: dts: rockchip: swap i2s clock ordering on rk3036
>
> For sound setups using the simple-card mechanism, the main clock
> (sysclk) is expected to be the first element. For the i2s-driver
> itself it doesn't matter, as it uses named clocks, so we can just
> swap them.
>
> Reported-by: Caesar Wang <wxt@rock-chips.com>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> ---
>   arch/arm/boot/dts/rk3036.dtsi | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi
> index 8f1bb0f..ee457a2 100644
> --- a/arch/arm/boot/dts/rk3036.dtsi
> +++ b/arch/arm/boot/dts/rk3036.dtsi
> @@ -241,8 +241,8 @@
>   		interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
>   		#address-cells = <1>;
>   		#size-cells = <0>;
> -		clock-names = "i2s_hclk", "i2s_clk";
> -		clocks = <&cru HCLK_I2S>, <&cru SCLK_I2S>;
> +		clock-names = "i2s_clk", "i2s_hclk";
> +		clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
>   		dmas = <&pdma 0>, <&pdma 1>;
>   		dma-names = "tx", "rx";
>   		pinctrl-names = "default";


-- 
Thanks,
Caesar

Re: [PATCH v2 06/12] mmc: pwrseq: add support for power-on sequencing through DT

[Javier Martinez Canillas]

Hello Heiko,

On 01/08/2016 11:42 PM, Heiko Stuebner wrote:
> Am Freitag, 8. Januar 2016, 09:22:31 schrieb Javier Martinez Canillas:
>>> For example:
>>> we need enable wifi module power to via the WL_REG_ON
>>> pin, we need enable it as the regulator if this pin is connected to
>>> the gpio of cpu.
>>
>> This part confuses me, so does your chip have an actual regulator that
>> needs to be enabled or is just a fake regulator whose gpio property is
>> used not to enable the regulator but to toggle the WL_REG_ON pin of
>> the WiFi chip?
> 
> another option would be to use the reset-gpio-handles. rk3288-veyron and I 
> think some Exynos as well use it that way.
>

Yes I know, my point was that the reset-gpios property should be used
instead of a fake regulator if what's needed is to toggle a chip pin.

>
>>> Maybe, someone will say that can pull up/down from dts.
>>> Unfortunately some SoCs can't support pinctrl pull up/down in
>>> internal.
>>
>> Can you please elaborate on this? AFAIU this limitation is the reason
>> why you went with the regulator approach so I think it deserve a more
>> deep explanation.
> 
> On the rk3036 each pin has an individual unchangable pull direction. So it's 
> either no bias or pulling in the predefined direction (the pin_default bias 
> option).
>

I think each change has to be justified on its own so I would say that
having a regulator enabled as a part of a SDIO chip's power sequencing
is something needed for many platforms, and that this provider should
be extended to support that (something like commit msg in patch 05/12).

And then in the kylin DTS change (patch 08/12), I would explain why a
chained regulators approach is used/needed instead of the reset-gpios
due any platform limitations.

> 
> Heiko
> 

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America

Re: [PATCH v2 04/12] clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for sclk_i2s_out

[Caesar Wang]

Heiko,

在 2016年01月08日 17:46, Heiko Stuebner 写道:
> Hi Caesar,
>
> Am Freitag, 8. Januar 2016, 17:26:18 schrieb Caesar Wang:
>> 在 2016年01月07日 18:05, Heiko Stuebner 写道:
>>> Am Donnerstag, 7. Januar 2016, 16:25:47 schrieb Caesar Wang:
>>>> SCLk_I2S_OUT is the noc bus clock for i2s module, this clock is used by
>>>> extra codecs.
>>>>
>>>> Due to it shouldn't belong to any driver, but we need it enabled,
>>>> so just mark it as the CLK_IGNORE_UNUSED flag.
>>> What makes you think it shouldn't belong to any driver?
>>>
>>> In most schematics I have, i2s_clkout is going to some clock-input of
>>> the
>>> audio codec - probably the MCLK input on your rt5616. And while the new
>>> rt5616 driver does not seem to do clock handling, it should just handle
>>> the clock using the normal APIs.
>> You are right,  that's seem has to find the root cause.
>> I'm wonder that the codec/i2s is working in kernel v4.1 patch without it.
>>
>> In general,  the MLCK will be handled in i2s driver if the cpu side is
>> master.
> looking at the rt5616 datasheet, that would be BCLK1 instead I think. This
> one does differentiate between being master/slave.
>
> The master/sysclk (mclk) is also handled in other drivers in all cases.
> (da7213.c, da7219.c, max98090.c, max98095.c, probably more)

Saw the patch:
https://patchwork.kernel.org/patch/5427131/

Add the follow that's working.

--- a/arch/arm/boot/dts/rk3036.dtsi
+++ b/arch/arm/boot/dts/rk3036.dtsi
@@ -288,8 +288,8 @@
                 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
                 #address-cells = <1>;
                 #size-cells = <0>;
-               clock-names = "i2s_clk", "i2s_hclk";
-               clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>;
+               clock-names = "i2s_clk", "i2s_hclk", "i2s_clk_out";
+               clocks = <&cru SCLK_I2S>, <&cru HCLK_I2S>, <&cru 
SCLK_I2S_OUT>;

Okay, I believe Mark likes that works in codec driver.

>
>
> Heiko
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip


-- 
Thanks,
Caesar

Re: [PATCH v2 06/12] mmc: pwrseq: add support for power-on sequencing through DT

[Caesar Wang]

Hi Javier,

在 2016年01月12日 00:02, Javier Martinez Canillas 写道:
> Hello Heiko,
>
> On 01/08/2016 11:42 PM, Heiko Stuebner wrote:
>> Am Freitag, 8. Januar 2016, 09:22:31 schrieb Javier Martinez Canillas:
>>>> For example:
>>>> we need enable wifi module power to via the WL_REG_ON
>>>> pin, we need enable it as the regulator if this pin is connected to
>>>> the gpio of cpu.
>>> This part confuses me, so does your chip have an actual regulator that
>>> needs to be enabled or is just a fake regulator whose gpio property is
>>> used not to enable the regulator but to toggle the WL_REG_ON pin of
>>> the WiFi chip?
>> another option would be to use the reset-gpio-handles. rk3288-veyron and I
>> think some Exynos as well use it that way.
>>
> Yes I know, my point was that the reset-gpios property should be used
> instead of a fake regulator if what's needed is to toggle a chip pin.
>
>>>> Maybe, someone will say that can pull up/down from dts.
>>>> Unfortunately some SoCs can't support pinctrl pull up/down in
>>>> internal.
>>> Can you please elaborate on this? AFAIU this limitation is the reason
>>> why you went with the regulator approach so I think it deserve a more
>>> deep explanation.
>> On the rk3036 each pin has an individual unchangable pull direction. So it's
>> either no bias or pulling in the predefined direction (the pin_default bias
>> option).
>>
> I think each change has to be justified on its own so I would say that
> having a regulator enabled as a part of a SDIO chip's power sequencing
> is something needed for many platforms, and that this provider should
> be extended to support that (something like commit msg in patch 05/12).
>
> And then in the kylin DTS change (patch 08/12), I would explain why a
> chained regulators approach is used/needed instead of the reset-gpios
> due any platform limitations.

Okay,
I 'm agreed with your points in here.

The reset-gpios/pwrsq can meet the demand of some wlan chips trigger 
condition.
No matter whatever is the BT_EN or WL_EN  triggers pin.

>> Heiko
>>
> Best regards,


-- 
Thanks,
Caesar