From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755403AbcDGIVM (ORCPT ); Thu, 7 Apr 2016 04:21:12 -0400 Received: from mail-by2on0087.outbound.protection.outlook.com ([207.46.100.87]:44128 "EHLO na01-by2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751231AbcDGIVE (ORCPT ); Thu, 7 Apr 2016 04:21:04 -0400 Authentication-Results: redhat.com; dkim=none (message not signed) header.d=none;redhat.com; dmarc=none action=none header.from=amd.com; From: Suravee Suthikulpanit To: , , , , , CC: , , , , Suravee Suthikulpanit Subject: [PART1 RFC v4 00/11] KVM: x86: Introduce SVM AVIC support Date: Thu, 7 Apr 2016 03:20:21 -0500 Message-ID: <1460017232-17429-1-git-send-email-Suravee.Suthikulpanit@amd.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [124.121.8.20] X-ClientProxiedBy: KL1PR02CA0009.apcprd02.prod.outlook.com (10.165.15.19) To SN1PR12MB0445.namprd12.prod.outlook.com (10.162.105.139) X-MS-Office365-Filtering-Correlation-Id: 35bab26c-9194-45b2-6411-08d35ebd8d27 X-Microsoft-Exchange-Diagnostics: 1;SN1PR12MB0445;2:Z1jxN691UA8PQalA2uBg8i8subYSGmUdDpqJ2F/ETwUdfnkV7856BQqXmae1pnpouhJn7kYpefUnkaPAbMpJvuK2bAT2cxO2lVbXLu67VMzPd5uCmPjM94QhHmawKAnrgNzQk+6ZqOXbo+aDvOfGwSgrXK0Gq3F7mlb8NhUfI+qPwF494ONssZ6gltWsZfY1;3:omtyCpgVZ21WR8LKiPecc/dkTqsVrQI7kKUIb5YzYxXTwVq3K6Ysd9Lk3hjzi7I4iZpbMMH8gqycCaMxRAdp5wICKcIFVBGwsFO89I96mhUehqrnXZ6NtnM+BnXD+Zpt;25:wT4JC5rJy790vJ8EyOzV1oG/o8ypZO1kNMfkRAlxSLDZe2WIvlFd62eGOesX8P00PBAhybFtv33Gqlckpv3w2BxyXKcOiV8102vOp8U59YlGZR0jWW8/UXFDDOr299rND/63C89iAWon/DEcYPmnMgIGoj0Y2dtArKiftU0l32NN3eol/eYr3AaP9zcX6foP7m1yeWyioynfwtSFLbI4jPr3KkmA361qV4HY3aIFYL/At04QGbULx09fgf/AKtA1Q7yXfxmBqheuqVU9PSEx+lJBNW7Fm1WVmaq50GhTaHBdXmxyHKsoTbSUJkY7tiT+RFjhy2Ehsxxwsf1AcQZVFA== X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:SN1PR12MB0445; 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However, it should still work with AVIC disabled. This is still work in progress. CHANGES FROM RFCv2: ================== (https://lkml.org/lkml/2016/3/4/746) * Do not use bit-field in VMCB. * Get rid of struct svm_vm_data, and consolidate the struct members into struct kvm_arch. * Do not abbreviate AVIC vmexit function and structure names. * Adding VM init/uninit function hooks and use it to initialize / uninitialize per-VM data structures. * Simplify AVIC backing page allocation to use the emulated lapic register page. * Introduce kvm_vcpu_wake_up() (from Radim). * Clean up AVIC vmexit handling functions. * Replace pr_debug with new AVIC tracepoints. * Use per-vcpu AVIC enable check (besides the global avic flag). * Add smb_mb__after_atomic() in svm_deliver_avic_intr. * Get rid of iommu related code for now. CHANGES FROM RFCv1: ================== (https://lkml.org/lkml/2016/2/12/225) * Rebased from tip.git * Use the vAPIC backing page as the emulated LAPIC register page. * Clarified with HW engineer that Avic sets the IRR of all the cores targeted whether they are running or not. It sends doorbells to the ones that are running to get them to evaluate their new state. If one or more weren't running it does the VMEXIT to indicate that the host needs to go run the not running guests. It gives it the ID of one of the guests that it observed not running which should be enough of a hint for the hypervisor to track them all down. * Rewrite the logic for handling AVIC_INCOMPLETE_IPI #vmexit for IPI target not running case based on information above. * Rewrite the logic in avic_vcpu_load() and avic_set_running(). * Rewrite the interrupt injection to remove the avic_pending_cnt variable. * Adding vcpu blocking/unblocking function hooks GITHUB ====== Latest git tree can be found at: http://github.com/ssuthiku/linux.git avic_part1_rfc_v4 OVERVIEW ======== This patch set is the first of the two-part patch series to introduce the new AMD Advance Virtual Interrupt Controller (AVIC) support. Basically, SVM AVIC hardware virtualizes local APIC registers of each vCPU via the virtual APIC (vAPIC) backing page. This allows guest access to certain APIC registers without the need to emulate the hardware behavior in the hypervisor. More information about AVIC can be found in the AMD64 Architecture Programmer’s Manual Volume 2 - System Programming. http://support.amd.com/TechDocs/24593.pdf For SVM AVIC, we extend the existing kvm_amd driver to: * Check CPUID to detect AVIC support in the processor * Program new fields in VMCB to enable AVIC * Introduce new AVIC data structures and add code to manage them * Handle two new AVIC #VMEXITs * Add new interrupt intjection code using vAPIC backing page instead of the existing V_IRQ, V_INTR_PRIO, V_INTR_VECTOR, and V_IGN_TPR fields Currently, this patch series does not enable AVIC by default. Users can enable SVM AVIC by specifying avic=1 during insmod kvm-amd. Later, in part 2, we will introduce the IOMMU AVIC support, which provides speed up for PCI device pass-through use case by allowing the IOMMU hardware to inject interrupt directly into the guest via the vAPIC backing page. PERFORMANCE RESULTS =================== Currently, AVIC is supported in the AMD family 15h models 6Xh (Carrizo) processors. Therefore, it is used to collect the perforamance data shown below. Generaly, SVM AVIC alone (w/o IOMMU AVIC) should provide speedup for IPI interrupt since hypervisor does not require VMEXIT to inject these interrupts. Also, it should speed up the case when hypervisor wants to inject an interrupt into a running guest by setting the corresponded IRR bit in the vAPIC backing page and trigger AVIC_DOORBELL MSR. IPI PERFORMANCE =============== * BENCHMARK 1: HACKBENCH For IPI, I have collected some performance number on 2 and 4 CPU running hackbech with the following detail: hackbench -p -l 100000 Running in process mode with 10 groups using 40 file descriptors each (== 400 tasks) Each sender will pass 100000 messages of 100 bytes | 2 vcpus | 4 vcpus ------------------------------------------------ Vanila | 273.76 | 190.21 AVIC disabled | 260.51 (~5%) | 184.40 (~5%) AVIC | 248.53 (~10%) | 155.01 (~20%) OVERALL PERFORMANCE =================== Enabling AVIC should helps speeding up workloads, which generate large amount of interrupts. However, it requires additional logics to maintain AVIC-specific data structures during vCPU load/unload due to vcpu scheduling. The goal is to minimize the overhead of AVIC in most cases, so that we can achieve equivalent or improvement in overall performance when enabling AVIC. * BENCHMARK 1: TAR DECOMPRESSION This test measures the average running time (of 10 runs) of the following tar decompression command with 1, 2, and 4 vcpus. tar xf linux-4.3.3.tar.xz | 4 vcpus --------------------------------- Vanila | 10.26 AVIC disabled | 10.10 (~1.5%) AVIC | 10.07 (~1.8%) Note: The unit of result below is in seconds (lower is better). * BENCHMARK 2: NETPERF w/ virtual network This test creates a virtual network by setting up bridge and tap device on the host and pass it into the VM as virtio-net-pci device w/ vhost. Then it sets up netserver in the host machine, and run netperf in the VM with following option: netperf -H -l 60 -t TCP_RR -D 2 | 1 vcpu ------------------------------------ Vanila | 21623.887 AVIC disabled | 21538.09 (~-.4%) AVIC | 21712.68 (~0.4%) Note: The unit of result below is trans/sec (higher is better). Preliminary result of both benchmarks show AVIC performance are slightly better than the other two cases. CURRENT UNTESTED USE-CASES =========================== - VM Migration (work in progress) - Nested VM Any feedback and comments are very much appreciated. Thank you, Suravee Radim Krčmář (1): KVM: split kvm_vcpu_wake_up from kvm_vcpu_kick Suravee Suthikulpanit (10): KVM: x86: Misc LAPIC changes to expose helper functions KVM: x86: Introducing kvm_x86_ops VM init/uninit hooks KVM: x86: Introducing kvm_x86_ops VCPU blocking/unblocking hooks svm: Introduce new AVIC VMCB registers KVM: x86: Detect and Initialize AVIC support svm: Add interrupt injection via AVIC svm: Add VMEXIT handlers for AVIC svm: Do not expose x2APIC when enable AVIC svm: Do not intercept CR8 when enable AVIC svm: Manage vcpu load/unload when enable AVIC arch/x86/include/asm/kvm_host.h | 25 +- arch/x86/include/asm/svm.h | 12 +- arch/x86/include/uapi/asm/svm.h | 9 +- arch/x86/kvm/lapic.c | 127 ++++---- arch/x86/kvm/lapic.h | 32 ++ arch/x86/kvm/svm.c | 637 +++++++++++++++++++++++++++++++++++++++- arch/x86/kvm/trace.h | 57 ++++ arch/x86/kvm/x86.c | 8 + include/linux/kvm_host.h | 1 + virt/kvm/kvm_main.c | 19 +- 10 files changed, 833 insertions(+), 94 deletions(-) -- 1.9.1