From: Jeremy Linton <jeremy.linton@arm.com>
To: linux-kernel@vger.kernel.org
Cc: will.deacon@arm.com, mark.rutland@arm.com, peterz@infradead.org,
mingo@redhat.com, catalin.marinas@arm.com, msalter@redhat.com,
timur@codeaurora.org, nleeder@codeaurora.org,
agustinv@codeaurora.org, sfr@canb.auug.org.au,
jan.glauber@gmail.com, Jeremy Linton <jeremy.linton@arm.com>
Subject: [PATCH 4/6] arm: arm64: Add routine to determine cpuid of other cpus
Date: Tue, 12 Apr 2016 15:21:09 -0500 [thread overview]
Message-ID: <1460492471-15527-5-git-send-email-jeremy.linton@arm.com> (raw)
In-Reply-To: <1460492471-15527-1-git-send-email-jeremy.linton@arm.com>
It is helpful if we can read the cpuid/midr of other CPUs
in the system independent of arm/arm64.
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
---
arch/arm/include/asm/cputype.h | 4 ++++
arch/arm64/include/asm/cputype.h | 3 +++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index b23c6c8..274baf4 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -208,6 +208,10 @@ static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
return read_cpuid(CPUID_MPIDR);
}
+#define read_specific_cpuid(cpu_num) per_cpu_ptr(&cpu_data, cpu_num)->cpuid
+
+
+
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 87e1985..76423a7 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -126,6 +126,9 @@ static inline u32 __attribute_const__ read_cpuid_cachetype(void)
{
return read_cpuid(CTR_EL0);
}
+
+#define read_specific_cpuid(cpu_num) per_cpu_ptr(&cpu_data, cpu_num)->reg_midr
+
#endif /* __ASSEMBLY__ */
#endif
--
2.4.3
next prev parent reply other threads:[~2016-04-12 20:22 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-12 20:21 [PATCH 0/6 v4] arm64/perf: Add ACPI support Jeremy Linton
2016-04-12 20:21 ` [PATCH 1/6] arm: pmu: Fix non-devicetree probing Jeremy Linton
2016-04-12 20:21 ` [PATCH 2/6] arm64: pmu: add fallback probe table Jeremy Linton
2016-04-12 20:21 ` [PATCH 3/6] arm64: pmu: Add support for probing with ACPI Jeremy Linton
2016-04-12 20:21 ` Jeremy Linton [this message]
2016-04-12 20:21 ` [PATCH 5/6] arm64: pmu: Add ACPI support for A72 and ThunderX Jeremy Linton
2016-04-12 20:21 ` [PATCH 6/6] arm64: pmu: Detect multiple PMU types in an ACPI system Jeremy Linton
2016-04-15 6:47 ` [PATCH 0/6 v4] arm64/perf: Add ACPI support Jan Glauber
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1460492471-15527-5-git-send-email-jeremy.linton@arm.com \
--to=jeremy.linton@arm.com \
--cc=agustinv@codeaurora.org \
--cc=catalin.marinas@arm.com \
--cc=jan.glauber@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mingo@redhat.com \
--cc=msalter@redhat.com \
--cc=nleeder@codeaurora.org \
--cc=peterz@infradead.org \
--cc=sfr@canb.auug.org.au \
--cc=timur@codeaurora.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).