From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753063AbcDVGtu (ORCPT ); Fri, 22 Apr 2016 02:49:50 -0400 Received: from mail-bn1bon0144.outbound.protection.outlook.com ([157.56.111.144]:25232 "EHLO na01-bn1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752065AbcDVGtf (ORCPT ); Fri, 22 Apr 2016 02:49:35 -0400 Authentication-Results: spf=neutral (sender IP is 192.88.158.2) smtp.mailfrom=freescale.com; nxp.com; dkim=none (message not signed) header.d=none;nxp.com; dmarc=none action=none header.from=freescale.com; From: Yunhui Cui To: , , CC: , , , , Yunhui Cui Subject: [PATCH v2 7/9] mtd: fsl-quadspi: Solve Micron Spansion flash command conflict Date: Fri, 22 Apr 2016 14:39:50 +0800 Message-ID: <1461307192-866-7-git-send-email-B56489@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1461307192-866-1-git-send-email-B56489@freescale.com> References: <1461307192-866-1-git-send-email-B56489@freescale.com> X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(2980300002)(189002)(199003)(4001450100002)(2906002)(229853001)(36756003)(586003)(86362001)(105586002)(106466001)(2201001)(92566002)(6806005)(11100500001)(5008740100001)(87936001)(4326007)(76176999)(50226001)(189998001)(50986999)(19580405001)(77096005)(19580395003)(48376002)(5003940100001)(104016004)(2950100001)(81166005)(50466002)(47776003)(1220700001)(1096002)(5001770100001)(7059030);DIR:OUT;SFP:1102;SCL:1;SRVR:BLUPR03MB068;H:az84smr01.freescale.net;FPR:;SPF:Neutral;MLV:sfv;MX:1;A:1;LANG:en; X-Microsoft-Exchange-Diagnostics: 1;BN1AFFO11FD028;1:12YCvDCoZ3M9f5JIQ3Rt7AFe2qClZZcK7Z5qmz4YweibCXImF7n1Mb/kKBVwLq8MFZcC+hIZosMbJFAv9e4FUE1t0405VM/2b93Tl+CxHBlU9yDFlSvAovoSdxt5P3D/Mgvg0sv2CclD1cNJAc7cASeH5gVTk9JvZNPMUa7ELE0EVeFIg2VJwzHw4za+hCj2u5/p/5qmKrSBbrnBNtJzKIKdBXoa1baf+/HiAYV/HfsqrGJxZeji6ZzhUEU67RpGTfCMo6K+HIVzVBX8c9AYg60q7E34V6vbSHEqv9rqNBtAgtZdAXumKYIO9sN3SyoIhfEXBEBr//HsYK+TcSYb9gpoLrSgV4L/60V5DUDkB76AyBpZVrzxgtLYjHSdumyieBpLJXwObPH/+X2Ya5xNhpbXtggrRTq0drePZmjjWZ8MDdGam3sntsnQVk95wMKS4g4N1+ZYfbT+4Oep0DJNNG6HyTYqLestIeF1M40eluv6BPIOwnL6K4GxTnavKiEE51anl2i0DAfN372qfT45Y13nY2wHzFNt7Nj63mJu77dpK61okCvU7AGOKEukccmDZo9mLM1EpAjID32fcJ5hzg== MIME-Version: 1.0 Content-Type: text/plain X-MS-Office365-Filtering-Correlation-Id: 20f431aa-5ff4-4697-181b-08d36a7a4093 X-Microsoft-Exchange-Diagnostics: 1;BLUPR03MB068;2:emLPWzNg7HrY4ThBOv7z6aYBM3yjjuvCqG8ZTJf0xj/dzPA2eXwukBhId89JlqNQT8ckUJEdRetNo7MreHXh87ypyC7fwWw18lY6F06wYKCgwd5qNDnaT6ACakpWoWiG59DoM66fGFb++8mgO2wt0CJCHnwjCZfTWROaOYBWZMb13Di1ixbAe0/kncVQdNLM;3:MHKdvkOrLwjHvzZnkyqrqKONMAoMXX8wHBA/kQCQRUpHT6jA3jQEHQ/7jBskypBgpTr8pco1SgYXnZwu2v22CrFTfnmgMg18RtLoxdbegYkqgZ4MQwjHUlMIamQikLw/boFxhySbSee8Ms/5pDRpbnVs+7Q7LluQZJpuQh+3XBR8MJtlRAq4md5zjVHExMMLknuXoxdYE9ui8vWf+PTFKNK6uSvkbEVz2jU+otsgyt0=;25:5T/twt9l9RNX3vN9XxDYwvM3xvy9knM0JWTqg7C2o3UH5xtOD416TS5pJARrPbeb+9KpXqt5uJ0X2I6pdjT9thWVw1ss1WyBzoLP83aFkkt5rcUUDV4ftrIi8SGBPUV6lfO9HQbJ5x/pr/Q1aV0oTmHL3kg3NNMT51MA+FGZKdVVltzrHQN+YwEkOlR2M30JuCgWqGeWYcbtOtVbpzPl60BUd8WBfLxtOpMNH6EvSZkFiCt3apqg5pl2TSQCmMh9tL+xAEZDH98QpichBatFWOvO3FDDH4m7Uw3WT9/7fSA3ytCT2ySgPyPNdsUj7BIzJqjjHPyosKKwOz5+mtZNfA== X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB068; X-Microsoft-Exchange-Diagnostics: 1;BLUPR03MB068;20:l+eGmVT4vUM4s2sjJqQPHNlh5wNo8GkLHtph8gzC6oqzR3QQzya+wv8gkrIkiY57VA/XP8dgbnDr8nTRaAGoveIVwEle1n3hsTdJ4IFzzQotftLrRWQiZ2plGRhENiW3LuX5UHt4apDROqFbgrHh0+RMxgsD/l3ZduYAeR9+SZB9f56wWo7rbBOff5diCn/kb65iqu1q1U31E2z8OMaK+3YUw5Sawyds1FDr3twu7LCO9Mz1cYfFCLzfryiO13EAXEYkRxAgVjqEYNC+67LpWzn+2RlfFoVCmrKZM7Z0n5+nsaK+GQllgk/Xa6byWAtVjyFB1auI4slgl31/PVTQI8R0qihU7lmwl8ww8bkVielSSO2KP6esMqO+UvZB5WHJ2qfu6b29ak+s8Udh7NGnSRN+9fVHuRdoCKkyNaJQT877QkTIVQcR85Y/lsqgxo8z;4:0HuBLCedur/juEqQVXl5lGfjlRa5C+sI4SJe57j8T0AfilFIRHph9KUsI6AYK7pggsNKP3zyhvjJbKzZvMkXrK6oDujEgX5khHU+EHV0FRy6nYDrIcbfAS8gHYCxNL1wCuU1Owa57sbHTsLbV5AhIqoVV1ULDRaQfCQ1gPrWarAeF2fx3TkISWx9fMz1f0qbzBLdCO0xDtuXGBH5r3c1zgX6uGgStaUyvyV3az/fUcYIktDRCxecJuHT2xbFnyvlK91k4969lrVS9om9gKhr2YuhjoFpIm6Z6z1vCZ6jSE0I/cb4I2v1G5R4/e/WfYT3DQ+Z99EFasljIEkDbDT+O2MofP8OJHMhww+eOqoTYTbyLsKDztuVMwcy/DWcLqft3w8ZuNBRhGsOjiLefpKjg2eDHJpakrK98p98ONFLHwR07MHOO0VvfA5X+FzwNvIPHI3ZQeWJX4wnv8nzza6NHS8lysd3V0HSxEToyHidx+mhwFB9+wJAIHELFrA1LTKx X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(9101521026)(601004)(2401047)(13017025)(13015025)(13023025)(13024025)(5005006)(13018025)(8121501046)(10201501046)(3002001)(6055026);SRVR:BLUPR03MB068;BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB068; X-Forefront-PRVS: 0920602B08 X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1;BLUPR03MB068;23:EHDs+2qzLfMVsJRsnpEv9V9rwfQYmrsbVB7jLmZat/?= =?us-ascii?Q?5pFRq8yxNsnyAVsLPkgr8N8v4/QyHPRnNWt9g7Y8bw/PlZ4Joz6BgXa+ip0a?= =?us-ascii?Q?4zFnXdXQCwE5i9lMCCcajv1RzCzCrESP56TC/FYj4W6XieZj7Iat7AqY6rns?= =?us-ascii?Q?jL+gE9vC1VRfh4qrVTllxxXzHxCMrz3fiOzADkKJ66Leu5+eWQu2s6rlEJI+?= =?us-ascii?Q?IssxknUQmlftzo3XT7nFpHXxINrJbq/OLNOEARG8ccN+I+f+OHV9s2xCeNrO?= =?us-ascii?Q?wTzg40wvacx/LZWtf7G6BLhKSoxoAN9NLwciA7+81bUQA0cS26DhpPR/wwys?= =?us-ascii?Q?ns2TJ9TjgDlQYUSn8HzNR1fotb3vVIK/Y1lgcHvJC2HkEOOCN/NOkagPH/rl?= =?us-ascii?Q?K3BKnnV8XUgUcY1NxVaayb0Btm7E2XHCAEvJ9hbTZkANPDFvnywXNNhLhO+j?= =?us-ascii?Q?QoZ6kba3JzHNPIalq8TsP5shksOECBwrTnd+p+SBQWh9ScF8sqoEypbFto5p?= =?us-ascii?Q?UyKyioBA36EmaSV6OMQHvhcPUhYCvqb6AoVh58UkBGzOLvZowXhz+kJvu+Hn?= =?us-ascii?Q?OPa4XS8VCk3ZB4jbaaVVpeWGi4LwfJMw0uHcry+qp4KBaig4+yUQRl+2sxDJ?= =?us-ascii?Q?caPFaP4i+7DGvZN9iYKSlD2pGlC38Y1w9xQ6qpGO7JXwmf8IABLLovixwK98?= =?us-ascii?Q?d/GjMkn69+I2X1hzTn45lKuOvXIHLnidBnup3SFMZF4dwLVIjEtCG9cD7r7Q?= =?us-ascii?Q?CODzBoXqLYSAua7wGSdGelYY8sZmKe/phO0zheSgyhT+wONzCoKiMUeaY+hp?= =?us-ascii?Q?A5s9cmW64B7qAfThyhlHpbhAxqp7vsP3+zAxbVf7FvHVLpMhEO84DaUd/xKd?= =?us-ascii?Q?ZI+YxZqM03OHGlC1blzPaJdSJa4JESrnFcFGbxe6oXeo5wIAqM77uUOu/Msq?= =?us-ascii?Q?qpiiuB5VniHS8sf6FCVI07V/DFO+lLNq5d3KNke+ubg/7QUQzvkjyr9P1qIa?= =?us-ascii?Q?s4duAxEB9hsYek84j3AfS5?= X-Microsoft-Exchange-Diagnostics: 1;BLUPR03MB068;5:kJwIyBdlpIlEBS5ngNADQtWm8RFsjOaC7oN1PkH5MKFmBucvMeq0H/Gd8/fr1oZB6cJZrbjWS7ATqzG9zaGQCM5hAgcGqJkX9D0liCHVzzBRoaMHEZvaAEv0xRbucVH8zqSTJhvWVTdQlGf6+C9rrdtjmnvBewb0Huk2rVf2nLaJjxuKYwwnF6VpludYDwa9;24:tPeweO2J51ffEkPHfXsT/qWL2Iw38xACK1UcgeFqWkAH3z31mhj5dwu9thPly8Xd8GSQEqT2anriijCIH4GX+42+kukNIMd/X/ncSNUzZiw=;7:V+rgh3Yhu9pHiCTwgIWXrTEhFiW+LwW4J1vHnuUicTY6o4RzB3II+7iDmHV62fvSuyvvKrtV7GhSlU+WcfPGetPMoTA+AwoHbgnzZlidDXTENt6rOfrBUH/RDJ4jnLffTkTCu8zDvXp1zlN2ORWcae1xMa509AepdbnAQrC8s9uo+b8YN5TPJNOPuigCOIV70Ft4n7i0k7zHiEiXTg1NaQ== X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Apr 2016 06:49:28.8968 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d;Ip=[192.88.158.2];Helo=[az84smr01.freescale.net] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR03MB068 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Yunhui Cui Add some lut_tables to support quad mode for flash n25q128 on the board ls1021a-twr and solve flash Spansion and Micron command conflict. In switch {}, The value of command SPINOR_OP_RD_EVCR and SPINOR_OP_SPANSION_RDAR is the same. They have to share the same seq_id: SEQID_RDAR_OR_RD_EVCR. Signed-off-by: Yunhui Cui --- drivers/mtd/spi-nor/fsl-quadspi.c | 47 ++++++++++++++++++++++++++++++--------- 1 file changed, 36 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 5d9d192..fea18b6 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -207,9 +207,9 @@ #define SEQID_RDCR 9 #define SEQID_EN4B 10 #define SEQID_BRWR 11 -#define SEQID_RDAR 12 +#define SEQID_RDAR_OR_RD_EVCR 12 #define SEQID_WRAR 13 - +#define SEQID_WD_EVCR 14 #define QUADSPI_MIN_IOMAP SZ_4M @@ -393,6 +393,7 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) int rxfifo = q->devtype_data->rxfifo; u32 lut_base; int i; + const struct fsl_qspi_devtype_data *devtype_data = q->devtype_data; struct spi_nor *nor = &q->nor[0]; u8 addrlen = (nor->addr_width == 3) ? ADDR24BIT : ADDR32BIT; @@ -489,16 +490,26 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_BRWR), base + QUADSPI_LUT(lut_base)); + /* - * Read any device register. - * Used for Spansion S25FS-S family flash only. + * Flash Micron and Spansion command confilict + * use the same value 0x65. But it indicates different meaning. */ - lut_base = SEQID_RDAR * 4; - qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_SPANSION_RDAR) | - LUT1(ADDR, PAD1, ADDR24BIT), - base + QUADSPI_LUT(lut_base)); - qspi_writel(q, LUT0(DUMMY, PAD1, 8) | LUT1(FSL_READ, PAD1, 1), - base + QUADSPI_LUT(lut_base + 1)); + lut_base = SEQID_RDAR_OR_RD_EVCR * 4; + if (devtype_data->devtype == FSL_QUADSPI_LS2080A) { + /* + * Read any device register. + * Used for Spansion S25FS-S family flash only. + */ + qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_SPANSION_RDAR) | + LUT1(ADDR, PAD1, ADDR24BIT), + base + QUADSPI_LUT(lut_base)); + qspi_writel(q, LUT0(DUMMY, PAD1, 8) | LUT1(FSL_READ, PAD1, 1), + base + QUADSPI_LUT(lut_base + 1)); + } else { + qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_RD_EVCR), + base + QUADSPI_LUT(lut_base)); + } /* * Write any device register. @@ -511,6 +522,11 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) qspi_writel(q, LUT0(FSL_WRITE, PAD1, 1), base + QUADSPI_LUT(lut_base + 1)); + /* Write EVCR register */ + lut_base = SEQID_WD_EVCR * 4; + qspi_writel(q, LUT0(CMD, PAD1, SPINOR_OP_WD_EVCR), + base + QUADSPI_LUT(lut_base)); + fsl_qspi_lock_lut(q); } @@ -523,8 +539,15 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) case SPINOR_OP_READ_FAST: case SPINOR_OP_READ4_FAST: return SEQID_READ; + /* + * Spansion & Micron use the same command value 0x65 + * Spansion: SPINOR_OP_SPANSION_RDAR, read any register. + * Micron: SPINOR_OP_RD_EVCR, + * read enhanced volatile configuration register. + * case SPINOR_OP_RD_EVCR: + */ case SPINOR_OP_SPANSION_RDAR: - return SEQID_RDAR; + return SEQID_RDAR_OR_RD_EVCR; case SPINOR_OP_SPANSION_WRAR: return SEQID_WRAR; case SPINOR_OP_WREN: @@ -550,6 +573,8 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) return SEQID_EN4B; case SPINOR_OP_BRWR: return SEQID_BRWR; + case SPINOR_OP_WD_EVCR: + return SEQID_WD_EVCR; default: if (cmd == q->nor[0].erase_opcode) return SEQID_SE; -- 2.1.0.27.g96db324