From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932653AbcFCKC6 (ORCPT ); Fri, 3 Jun 2016 06:02:58 -0400 Received: from michel.telenet-ops.be ([195.130.137.88]:54144 "EHLO michel.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932300AbcFCKAO (ORCPT ); Fri, 3 Jun 2016 06:00:14 -0400 From: Geert Uytterhoeven To: Greg Kroah-Hartman , Jiri Slaby , Peter Hurley Cc: Magnus Damm , Laurent Pinchart , Yoshinori Sato , linux-serial@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-sh@vger.kernel.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 09/11] serial: sh-sci: Add pin initialization for SCIFA/SCIFB Date: Fri, 3 Jun 2016 12:00:09 +0200 Message-Id: <1464948011-377-10-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1464948011-377-1-git-send-email-geert+renesas@glider.be> References: <1464948011-377-1-git-send-email-geert+renesas@glider.be> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Before, the driver relied on initialization by the boot loader, or by implicit reset state. Note that unlike on (H)SCIF, the RTS/CTS bits exist only if dedicated RTS/CTS pins are available, which depends on the SoC and UART instance. Signed-off-by: Geert Uytterhoeven --- v3: - No changes, v2: - New. --- drivers/tty/serial/sh-sci.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index c46999f20917964e..b9d027af0f3e71f6 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -712,7 +712,21 @@ static void sci_init_pins(struct uart_port *port, unsigned int cflag) return; } - if (sci_getreg(port, SCSPTR)->size) { + if (port->type == PORT_SCIFA || port->type == PORT_SCIFB) { + u16 ctrl = serial_port_in(port, SCPCR); + + /* Enable RXD and TXD pin functions */ + ctrl &= ~(SCPCR_RXDC | SCPCR_TXDC); + if (to_sci_port(port)->cfg->capabilities & SCIx_HAVE_RTSCTS) { + /* RTS# is output, driven 1 */ + ctrl |= SCPCR_RTSC; + serial_port_out(port, SCPDR, + serial_port_in(port, SCPDR) | SCPDR_RTSD); + /* Enable CTS# pin function */ + ctrl &= ~SCPCR_CTSC; + } + serial_port_out(port, SCPCR, ctrl); + } else if (sci_getreg(port, SCSPTR)->size) { u16 status = serial_port_in(port, SCSPTR); /* RTS# is output, driven 1 */ -- 1.9.1