From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752822AbcFCPvB (ORCPT ); Fri, 3 Jun 2016 11:51:01 -0400 Received: from m50-112.126.com ([123.125.50.112]:35101 "EHLO m50-112.126.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752093AbcFCPu6 (ORCPT ); Fri, 3 Jun 2016 11:50:58 -0400 From: Chris Zhong To: dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com Cc: linux-rockchip@lists.infradead.org, Chris Zhong , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [v1 PATCH 1/4] Documentation: bindings: add dt doc for Rockchip USB Type-C PHY Date: Fri, 3 Jun 2016 23:15:08 +0800 Message-Id: <1464966911-18949-2-git-send-email-zyw@rock-chips.com> X-Mailer: git-send-email 2.6.3 In-Reply-To: <1464966911-18949-1-git-send-email-zyw@rock-chips.com> References: <1464966911-18949-1-git-send-email-zyw@rock-chips.com> X-CM-TRANSID: j9KowAA3pmF6n1FXuvuJAA--.1790S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7Cr45Jry5CFyxurWrtry7Jrb_yoW8KFW7pw sxCFyfJF18tF1xuwsIkryxAr4rXwn5CFs5K3W7ZFyrKay8Jrn8KasIkrykZa4UJrWkZay2 vFW7tFWIkw17A3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jgXo7UUUUU= X-Originating-IP: [211.97.105.9] X-CM-SenderInfo: p21zt0rjttqiyswou0bp/1tbiVwt95FPh9TfKBwAAs4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds a binding that describes the Rockchip USB Type-C PHY for rk3399 Signed-off-by: Chris Zhong --- Changes in v1: - add extcon node description - move the registers in phy driver - remove the suffix of reset .../devicetree/bindings/phy/phy-rockchip-typec.txt | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt diff --git a/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt new file mode 100644 index 0000000..964e0f7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/phy-rockchip-typec.txt @@ -0,0 +1,46 @@ +* ROCKCHIP type-c PHY +--------------------- + +Required properties: + - compatible: should be "rockchip,rk3399-typec-phy0" or + "rockchip,rk3399-typec-phy1" + - reg : Address and length of the usb phy control register set + - rockchip,grf : phandle to the syscon managing the "general + register files" + - clocks : phandle + clock specifier for the phy clocks + - clock-names: string, clock name, must be "tcpdcore", "tcpdphy_ref"; + - resets : a list of phandle + reset specifier pairs + - reset-names : string reset name, must be: + "tcphy", "tcphy_pipe", "uphy_tcphy" + - #phy-cells: Must be 0. See ./phy-bindings.txt for details. + - extcon: extcon specifier for the Power Delivery + +Example: + tcphy0: phy@ff7c0000 { + compatible = "rockchip,rk3399-typec-phy0"; + reg = <0x0 0xff7c0000 0x0 0x40000>; + #phy-cells = <0>; + extcon = <&fusb1>; + rockchip,grf = <&grf>; + clocks = <&cru SCLK_UPHY0_TCPDCORE>, + <&cru SCLK_UPHY0_TCPDPHY_REF>; + clock-names = "tcpdcore", "tcpdphy_ref"; + resets = <&cru SRST_UPHY0>, + <&cru SRST_UPHY0_PIPE_L00>, + <&cru SRST_P_UPHY0_TCPHY>; + reset-names = "tcphy", "tcphy_pipe", "uphy_tcphy"; + }; + + tcphy1: phy@ff800000 { + compatible = "rockchip,rk3399-typec-phy1"; + reg = <0x0 0xff800000 0x0 0x40000>; + #phy-cells = <0>; + rockchip,grf = <&grf>; + clocks = <&cru SCLK_UPHY1_TCPDCORE>, + <&cru SCLK_UPHY1_TCPDPHY_REF>; + clock-names = "tcpdcore", "tcpdphy_ref"; + resets = <&cru SRST_UPHY1>, + <&cru SRST_UPHY1_PIPE_L00>, + <&cru SRST_P_UPHY1_TCPHY>; + reset-names = "tcphy", "tcphy_pipe", "uphy_tcphy"; + }; -- 2.6.3