From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752189AbcFFK1j (ORCPT ); Mon, 6 Jun 2016 06:27:39 -0400 Received: from mail-lf0-f66.google.com ([209.85.215.66]:36749 "EHLO mail-lf0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751073AbcFFKZA (ORCPT ); Mon, 6 Jun 2016 06:25:00 -0400 From: Aleksei Mamlin To: Maxime Ripard , Chen-Yu Tsai , Boris Brezillon , Richard Weinberger , David Woodhouse , Brian Norris Cc: linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, Aleksei Mamlin Subject: [PATCH 1/7] ARM: dts: sun4i: Add A10 NAND controller pin definitions Date: Mon, 6 Jun 2016 13:24:18 +0300 Message-Id: <1465208664-9366-2-git-send-email-mamlinav@gmail.com> X-Mailer: git-send-email 2.7.3 In-Reply-To: <1465208664-9366-1-git-send-email-mamlinav@gmail.com> References: <1465208664-9366-1-git-send-email-mamlinav@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Boris Brezillon Define the NAND controller pin configs. Signed-off-by: Boris Brezillon Signed-off-by: Aleksei Mamlin --- arch/arm/boot/dts/sun4i-a10.dtsi | 80 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi index a9c3190..146a08db 100644 --- a/arch/arm/boot/dts/sun4i-a10.dtsi +++ b/arch/arm/boot/dts/sun4i-a10.dtsi @@ -1144,6 +1144,86 @@ allwinner,drive = ; allwinner,pull = ; }; + + nand_pins_a: nand_base0@0 { + allwinner,pins = "PC0", "PC1", "PC2", + "PC5", "PC8", "PC9", "PC10", + "PC11", "PC12", "PC13", "PC14", + "PC15", "PC16"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs0_pins_a: nand_cs@0 { + allwinner,pins = "PC4"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs1_pins_a: nand_cs@1 { + allwinner,pins = "PC3"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs2_pins_a: nand_cs@2 { + allwinner,pins = "PC17"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs3_pins_a: nand_cs@3 { + allwinner,pins = "PC18"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs4_pins_a: nand_cs@4 { + allwinner,pins = "PC19"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs5_pins_a: nand_cs@5 { + allwinner,pins = "PC20"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs6_pins_a: nand_cs@6 { + allwinner,pins = "PC21"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_cs7_pins_a: nand_cs@7 { + allwinner,pins = "PC22"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_rb0_pins_a: nand_rb@0 { + allwinner,pins = "PC6"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; + + nand_rb1_pins_a: nand_rb@1 { + allwinner,pins = "PC7"; + allwinner,function = "nand0"; + allwinner,drive = ; + allwinner,pull = ; + }; }; timer@01c20c00 { -- 2.7.3