From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757313AbcFHO6x (ORCPT ); Wed, 8 Jun 2016 10:58:53 -0400 Received: from down.free-electrons.com ([37.187.137.238]:55745 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754493AbcFHO6u (ORCPT ); Wed, 8 Jun 2016 10:58:50 -0400 From: Boris Brezillon To: David Woodhouse , Brian Norris , linux-mtd@lists.infradead.org, Boris Brezillon , Richard Weinberger Cc: linux-kernel@vger.kernel.org Subject: [PATCH 0/3] mtd: nand: standardize ECC maximization Date: Wed, 8 Jun 2016 16:58:43 +0200 Message-Id: <1465397926-7904-1-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, This series aims at standardizing a feature already supported by some NAND controller drivers: setting the maximum ECC strength based on the OOB area size instead of using the ECC strength/step_size information retrieved from the DT or NAND detection code. This is particularly useful when the NAND device is used in by a FS/wear-leveling layer that is not using the OOB area at all (this is the case of UBI). Note that drivers already implementing this kind of logic are not converted to the new approach (because of backward compatibility concern), but new drivers or drivers that do not already implement this 'ECC maximization' logic are encouraged to do it. Regards, Boris Boris Brezillon (3): mtd: nand: Add an option to maximize the ECC strength mtd: nand: Support maximizing ECC when using software BCH mtd: nand: sunxi: Support ECC maximization Documentation/devicetree/bindings/mtd/nand.txt | 9 ++++++++ drivers/mtd/nand/nand_base.c | 23 ++++++++++++++++++++ drivers/mtd/nand/sunxi_nand.c | 29 ++++++++++++++++++++++++++ include/linux/mtd/nand.h | 1 + 4 files changed, 62 insertions(+) -- 2.7.4