From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753480AbcFJWNY (ORCPT ); Fri, 10 Jun 2016 18:13:24 -0400 Received: from down.free-electrons.com ([37.187.137.238]:44206 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752096AbcFJWEQ (ORCPT ); Fri, 10 Jun 2016 18:04:16 -0400 From: Alexandre Belloni To: Nicolas Ferre Cc: Boris Brezillon , Jean-Christophe Plagniol-Villard , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Alexandre Belloni Subject: [PATCH 25/48] ARM: dts: at91: at91sam9x5: TC blocks are also simple-mfd and syscon devices Date: Sat, 11 Jun 2016 00:03:28 +0200 Message-Id: <1465596231-21766-26-git-send-email-alexandre.belloni@free-electrons.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1465596231-21766-1-git-send-email-alexandre.belloni@free-electrons.com> References: <1465596231-21766-1-git-send-email-alexandre.belloni@free-electrons.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add simple-mfd and syscon to the TC blocks to allow to register one of the channels as clocksource properly at boot time. It also allows to use regmap instead of tclib. Signed-off-by: Alexandre Belloni --- arch/arm/boot/dts/at91sam9x5.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi index cd0cd5fd09a3..6d845993406f 100644 --- a/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/arch/arm/boot/dts/at91sam9x5.dtsi @@ -417,7 +417,9 @@ }; tcb0: timer@f8008000 { - compatible = "atmel,at91sam9x5-tcb"; + compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; reg = <0xf8008000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb0_clk>, <&clk32k>; @@ -425,7 +427,9 @@ }; tcb1: timer@f800c000 { - compatible = "atmel,at91sam9x5-tcb"; + compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon"; + #address-cells = <1>; + #size-cells = <0>; reg = <0xf800c000 0x100>; interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>; clocks = <&tcb0_clk>, <&clk32k>; -- 2.8.1