From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <pbonzini@redhat.com>, <rkrcmar@redhat.com>, <joro@8bytes.org>,
<alex.williamson@redhat.com>
Cc: <kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<sherry.hurwitz@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PART2 RFC v2 08/10] svm: Introduce AMD IOMMU avic_ga_log_notifier
Date: Mon, 13 Jun 2016 17:06:48 -0500 [thread overview]
Message-ID: <1465855611-10092-9-git-send-email-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <1465855611-10092-1-git-send-email-suravee.suthikulpanit@amd.com>
This patch introduces avic_ga_log_notifier, which will be called
by IOMMU driver whenever it handles the Guest vAPIC (GA) log entry.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/svm.c | 58 ++++++++++++++++++++++++++++++++++++++++-
2 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index e0fbe7e..a714cc2 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -775,9 +775,11 @@ struct kvm_arch {
bool disabled_lapic_found;
/* Struct members for AVIC */
+ u32 avic_tag;
u32 ldr_mode;
struct page *avic_logical_id_table_page;
struct page *avic_physical_id_table_page;
+ struct hlist_node hnode;
};
struct kvm_vm_stat {
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index 04707b7..a0aaaa6 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -34,6 +34,8 @@
#include <linux/sched.h>
#include <linux/trace_events.h>
#include <linux/slab.h>
+#include <linux/amd-iommu.h>
+#include <linux/hashtable.h>
#include <asm/apic.h>
#include <asm/perf_event.h>
@@ -926,6 +928,45 @@ static void svm_disable_lbrv(struct vcpu_svm *svm)
set_msr_interception(msrpm, MSR_IA32_LASTINTTOIP, 0, 0);
}
+#define SVM_VM_DATA_HASH_BITS 8
+DECLARE_HASHTABLE(svm_vm_data_hash, SVM_VM_DATA_HASH_BITS);
+static spinlock_t svm_vm_data_hash_lock;
+
+static int avic_ga_log_notifier(int avic_tag, int vcpu_id, int vec)
+{
+ unsigned long flags;
+ struct kvm_arch *ka = NULL;
+ struct kvm_vcpu *vcpu = NULL;
+ struct vcpu_svm *svm = NULL;
+
+ pr_debug("SVM: %s: avic_tag=%#x, vcpu_id=%#x, vec=%#x\n",
+ __func__, avic_tag, vcpu_id, vec);
+
+ spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
+ hash_for_each_possible(svm_vm_data_hash, ka, hnode, avic_tag) {
+ struct kvm *kvm = container_of(ka, struct kvm, arch);
+
+ vcpu = kvm_get_vcpu_by_id(kvm, vcpu_id);
+ break;
+ }
+ spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
+
+ if (!vcpu)
+ return 0;
+
+ svm = to_svm(vcpu);
+
+ /* Note:
+ * At this point, the IOMMU should have already set the pending
+ * bit in the vAPIC backing page. So, we just need to schedule
+ * in the vcpu.
+ */
+ if (vcpu->mode == OUTSIDE_GUEST_MODE)
+ kvm_vcpu_wake_up(vcpu);
+
+ return 0;
+}
+
static __init int svm_hardware_setup(void)
{
int cpu;
@@ -984,9 +1025,14 @@ static __init int svm_hardware_setup(void)
if (avic && (!npt_enabled || !boot_cpu_has(X86_FEATURE_AVIC)))
avic = false;
- if (avic)
+ if (avic) {
pr_info("AVIC enabled\n");
+ hash_init(svm_vm_data_hash);
+ spin_lock_init(&svm_vm_data_hash_lock);
+ amd_iommu_register_ga_log_notifier(&avic_ga_log_notifier);
+ }
+
return 0;
err:
@@ -1277,16 +1323,22 @@ static int avic_init_backing_page(struct kvm_vcpu *vcpu)
static void avic_vm_destroy(struct kvm *kvm)
{
+ unsigned long flags;
struct kvm_arch *vm_data = &kvm->arch;
if (vm_data->avic_logical_id_table_page)
__free_page(vm_data->avic_logical_id_table_page);
if (vm_data->avic_physical_id_table_page)
__free_page(vm_data->avic_physical_id_table_page);
+
+ spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
+ hash_del(&vm_data->hnode);
+ spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
}
static int avic_vm_init(struct kvm *kvm)
{
+ unsigned long flags;
int err = -ENOMEM;
struct kvm_arch *vm_data = &kvm->arch;
struct page *p_page;
@@ -1311,6 +1363,10 @@ static int avic_vm_init(struct kvm *kvm)
vm_data->avic_logical_id_table_page = l_page;
clear_page(page_address(l_page));
+ spin_lock_irqsave(&svm_vm_data_hash_lock, flags);
+ hash_add(svm_vm_data_hash, &vm_data->hnode, vm_data->avic_tag);
+ spin_unlock_irqrestore(&svm_vm_data_hash_lock, flags);
+
return 0;
free_avic:
--
1.9.1
next prev parent reply other threads:[~2016-06-13 22:22 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 22:06 [PART2 RFC v2 00/10] iommu/AMD: Introduce IOMMU AVIC support Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 01/10] iommu/amd: Detect and enable guest vAPIC support Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 02/10] iommu/amd: Add support for 128-bit IRTE Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 03/10] iommu/amd: Detect and initialize guest vAPIC log Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 04/10] iommu/amd: Adding GALOG interrupt handler Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 05/10] iommu/amd: Introduce amd_iommu_update_ga() Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 06/10] iommu/amd: Implements irq_set_vcpu_affinity() hook to setup vapic mode for pass-through devices Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 07/10] iommu/amd: Enable vAPIC interrupt remapping mode by default Suravee Suthikulpanit
2016-06-13 22:06 ` Suravee Suthikulpanit [this message]
2016-06-13 22:06 ` [PART2 RFC v2 09/10] svm: Implements update_pi_irte hook to setup posted interrupt Suravee Suthikulpanit
2016-06-13 22:06 ` [PART2 RFC v2 10/10] svm: Update AMD IOMMU IRTE with vcpu scheduling information when enable AVIC Suravee Suthikulpanit
2016-06-21 13:50 ` [PART2 RFC v2 00/10] iommu/AMD: Introduce IOMMU AVIC support Joerg Roedel
2016-06-21 14:27 ` Suravee Suthikulanit
2016-06-21 14:46 ` Joerg Roedel
2016-06-21 15:45 ` Suravee Suthikulanit
2016-06-21 15:15 ` Paolo Bonzini
2016-07-05 18:51 ` Suravee Suthikulpanit
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