From: Douglas Anderson <dianders@chromium.org>
To: ulf.hansson@linaro.org, kishon@ti.com,
Heiko Stuebner <heiko@sntech.de>,
robh+dt@kernel.org
Cc: shawn.lin@rock-chips.com, xzy.xu@rock-chips.com,
briannorris@chromium.org, adrian.hunter@intel.com,
linux-rockchip@lists.infradead.org, linux-mmc@vger.kernel.org,
devicetree@vger.kernel.org,
Douglas Anderson <dianders@chromium.org>,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
catalin.marinas@arm.com, will.deacon@arm.com,
zhengxing@rock-chips.com, jay.xu@rock-chips.com,
wxt@rock-chips.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399
Date: Mon, 13 Jun 2016 16:04:29 -0700 [thread overview]
Message-ID: <1465859076-4868-6-git-send-email-dianders@chromium.org> (raw)
In-Reply-To: <1465859076-4868-1-git-send-email-dianders@chromium.org>
On rk3399 we'd like to be able to properly set corecfg registers in the
Arasan SDHCI component. Specify the syscon to enable that.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
Changes in v2: None
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index a4383f359264..1b57e92e0093 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -220,6 +220,7 @@
compatible = "rockchip,rk3399-sdhci-5.1", "arasan,sdhci-5.1";
reg = <0x0 0xfe330000 0x0 0x10000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ arasan,soc-ctl-syscon = <&grf>;
assigned-clocks = <&cru SCLK_EMMC>;
assigned-clock-rates = <200000000>;
clocks = <&cru SCLK_EMMC>, <&cru ACLK_EMMC>;
--
2.8.0.rc3.226.g39d4020
next prev parent reply other threads:[~2016-06-13 23:08 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-13 23:04 [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Douglas Anderson
2016-06-13 23:04 ` [PATCH v2 01/11] phy: rockchip-emmc: Increase lock time allowance Douglas Anderson
2016-06-14 0:28 ` Shawn Lin
2016-06-20 13:03 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 02/11] mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes Douglas Anderson
2016-06-14 0:30 ` Shawn Lin
2016-06-13 23:04 ` [PATCH v2 03/11] Documentation: mmc: sdhci-of-arasan: Add soc-ctl-syscon for corecfg regs Douglas Anderson
2016-06-14 0:33 ` Shawn Lin
2016-06-18 14:15 ` Heiko Stübner
2016-06-13 23:04 ` [PATCH v2 04/11] mmc: sdhci-of-arasan: Properly set corecfg_baseclkfreq on rk3399 Douglas Anderson
2016-06-18 17:59 ` Heiko Stuebner
2016-06-13 23:04 ` Douglas Anderson [this message]
2016-06-18 12:49 ` [PATCH v2 05/11] arm64: dts: rockchip: Add soc-ctl-syscon to sdhci for rk3399 Heiko Stübner
2016-06-13 23:04 ` [PATCH v2 06/11] Documentation: mmc: sdhci-of-arasan: Add ability to export card clock Douglas Anderson
2016-06-18 18:02 ` Heiko Stuebner
2016-06-13 23:04 ` [PATCH v2 07/11] " Douglas Anderson
2016-06-15 16:40 ` Doug Anderson
2016-06-13 23:04 ` [PATCH v2 08/11] Documentation: phy: Let the rockchip eMMC PHY get an exported " Douglas Anderson
2016-06-16 18:42 ` Rob Herring
2016-06-18 21:48 ` Heiko Stübner
2016-06-20 13:04 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 09/11] phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off() Douglas Anderson
2016-06-14 0:36 ` Shawn Lin
2016-06-20 13:04 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 10/11] phy: rockchip-emmc: Set phyctrl_frqsel based on card clock Douglas Anderson
2016-06-18 12:20 ` Heiko Stübner
2016-06-20 16:48 ` Doug Anderson
2016-06-20 13:08 ` Kishon Vijay Abraham I
2016-06-13 23:04 ` [PATCH v2 11/11] arm64: dts: rockchip: Provide emmcclk to PHY for rk3399 Douglas Anderson
2016-06-18 12:07 ` Heiko Stübner
2016-06-16 23:39 ` [PATCH v2 0/11] Changes to support 150 MHz eMMC on rk3399 Heiko Stuebner
2016-06-17 12:39 ` Kishon Vijay Abraham I
2016-06-17 15:37 ` Doug Anderson
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