From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423843AbcFNDBg (ORCPT ); Mon, 13 Jun 2016 23:01:36 -0400 Received: from conuserg-12.nifty.com ([210.131.2.79]:55633 "EHLO conuserg-12.nifty.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423693AbcFNDBf (ORCPT ); Mon, 13 Jun 2016 23:01:35 -0400 DKIM-Filter: OpenDKIM Filter v2.10.3 conuserg-12.nifty.com u5E30QCv023365 X-Nifty-SrcIP: [153.142.97.92] From: Masahiro Yamada To: arm@kernel.org Cc: Masahiro Yamada , Will Deacon , Catalin Marinas , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] arm64: dts: uniphier: add /memreserve/ for spin-table release address Date: Tue, 14 Jun 2016 12:01:43 +0900 Message-Id: <1465873303-30754-4-git-send-email-yamada.masahiro@socionext.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1465873303-30754-1-git-send-email-yamada.masahiro@socionext.com> References: <1465873303-30754-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org As Documentation/arm64/booting.txt says, the cpu-release-addr location should be reserved. Signed-off-by: Masahiro Yamada Acked-by: Mark Rutland --- arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi index 644025c..c223915 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ph1-ld20.dtsi @@ -42,6 +42,8 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +/memreserve/ 0x80000000 0x00000008; /* cpu-release-addr */ + / { compatible = "socionext,ph1-ld20"; #address-cells = <2>; -- 1.9.1