From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To: "Bryan O'Donoghue" <pure.logic@nexus-software.ie>,
Peter Hurley <peter@hurleysoftware.com>,
linux-serial@vger.kernel.org, Vinod Koul <vinod.koul@intel.com>,
linux-kernel@vger.kernel.org, dmaengine@vger.kernel.org,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
ismo.puustinen@intel.com,
Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: [PATCH v7 03/11] dmaengine: dw: set polarity of handshake interface
Date: Fri, 17 Jun 2016 15:41:03 +0300 [thread overview]
Message-ID: <1466167271-11902-4-git-send-email-andriy.shevchenko@linux.intel.com> (raw)
In-Reply-To: <1466167271-11902-1-git-send-email-andriy.shevchenko@linux.intel.com>
Intel Quark UART uses DesignWare DMA IP. Though the DMA IP is connected in such
way that handshake interface uses inverted polarity. We have to provide a
possibility to set this in the DMA driver when configuring a channel.
Introduce a new member of custom slave configuration called 'hs_polarity' and
set active low polarity in case this value is 'true'.
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
drivers/dma/dw/core.c | 4 ++++
include/linux/platform_data/dma-dw.h | 2 ++
2 files changed, 6 insertions(+)
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 81b06df..59f571c 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -150,6 +150,10 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
+ /* Set polarity of handshake interface */
+ cfglo |= dwc->dws.hs_polarity ?
+ DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
+
channel_writel(dwc, CFG_LO, cfglo);
channel_writel(dwc, CFG_HI, cfghi);
diff --git a/include/linux/platform_data/dma-dw.h b/include/linux/platform_data/dma-dw.h
index d15d8ba..4636c93 100644
--- a/include/linux/platform_data/dma-dw.h
+++ b/include/linux/platform_data/dma-dw.h
@@ -23,6 +23,7 @@
* @dst_id: dst request line
* @m_master: memory master for transfers on allocated channel
* @p_master: peripheral master for transfers on allocated channel
+ * @hs_polarity:set active low polarity of handshake interface
*/
struct dw_dma_slave {
struct device *dma_dev;
@@ -30,6 +31,7 @@ struct dw_dma_slave {
u8 dst_id;
u8 m_master;
u8 p_master;
+ bool hs_polarity;
};
/**
--
2.8.1
next prev parent reply other threads:[~2016-06-17 12:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-17 12:41 [PATCH v7 00/11] serial: 8250: split LPSS to 8250_lpss, enable DMA on Quark Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 01/11] dmaengine: dw: keep copy of custom slave config in dwc Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 02/11] dmaengine: dw: provide probe(), remove() stubs for users Andy Shevchenko
2016-06-17 12:41 ` Andy Shevchenko [this message]
2016-06-17 12:41 ` [PATCH v7 04/11] dmaengine: dw: override LLP support if asked in platform data Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 05/11] serial: 8250_dma: switch to new dmaengine_terminate_* API Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 06/11] serial: 8250_dma: adjust DMA address of the UART Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 07/11] serial: 8250: enable AFE on ports where FIFO is 16 bytes Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 08/11] serial: 8250_lpss: split LPSS driver to separate module Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 09/11] serial: 8250_lpss: move Quark code from PCI driver Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 10/11] serial: 8250_lpss: enable MSI for Intel Quark Andy Shevchenko
2016-06-17 12:41 ` [PATCH v7 11/11] serial: 8250_lpss: enable DMA on Intel Quark UART Andy Shevchenko
2016-06-17 13:46 ` kbuild test robot
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