From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932164AbcF3Kzn (ORCPT ); Thu, 30 Jun 2016 06:55:43 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:2631 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752062AbcF3Kxf (ORCPT ); Thu, 30 Jun 2016 06:53:35 -0400 X-IBM-Helo: d23dlp02.au.ibm.com X-IBM-MailFrom: xyjxie@linux.vnet.ibm.com X-IBM-RcptTo: linux-doc@vger.kernel.org;linux-kernel@vger.kernel.org;linux-pci@vger.kernel.org From: Yongji Xie To: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-doc@vger.kernel.org Cc: bhelgaas@google.com, alex.williamson@redhat.com, aik@ozlabs.ru, benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, corbet@lwn.net, warrier@linux.vnet.ibm.com, zhong@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com, gwshan@linux.vnet.ibm.com Subject: [PATCH v3 5/7] PCI: Do not use IORESOURCE_STARTALIGN to identify bridge resources Date: Thu, 30 Jun 2016 18:53:11 +0800 X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1467283993-3185-1-git-send-email-xyjxie@linux.vnet.ibm.com> References: <1467283993-3185-1-git-send-email-xyjxie@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16063010-0052-0000-0000-000001A90880 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16063010-0053-0000-0000-0000064A7B18 Message-Id: <1467283993-3185-6-git-send-email-xyjxie@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-06-30_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1606300103 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Now we use the IORESOURCE_STARTALIGN to identify bridge resources in __assign_resources_sorted(). That's quite fragile. We may also set flag IORESOURCE_STARTALIGN for SR-IOV resources in some cases, for example, using the option "noresize" of parameter "pci=resource_alignment". In this patch, we try to use a more robust way to identify bridge resources. Signed-off-by: Yongji Xie --- drivers/pci/setup-bus.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 55641a3..216ddbc 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -390,6 +390,7 @@ static void __assign_resources_sorted(struct list_head *head, struct pci_dev_resource *dev_res, *tmp_res, *dev_res2; unsigned long fail_type; resource_size_t add_align, align; + int index; /* Check if optional add_size is there */ if (!realloc_head || list_empty(realloc_head)) @@ -410,11 +411,13 @@ static void __assign_resources_sorted(struct list_head *head, /* * There are two kinds of additional resources in the list: - * 1. bridge resource -- IORESOURCE_STARTALIGN - * 2. SR-IOV resource -- IORESOURCE_SIZEALIGN + * 1. bridge resource + * 2. SR-IOV resource * Here just fix the additional alignment for bridge */ - if (!(dev_res->res->flags & IORESOURCE_STARTALIGN)) + index = dev_res->res - dev_res->dev->resource; + if (index < PCI_BRIDGE_RESOURCES || + index > PCI_BRIDGE_RESOURCE_END) continue; add_align = get_res_add_align(realloc_head, dev_res->res); -- 1.7.9.5