From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752048AbcGLWmu (ORCPT ); Tue, 12 Jul 2016 18:42:50 -0400 Received: from bombadil.infradead.org ([198.137.202.9]:45245 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752602AbcGLWlF (ORCPT ); Tue, 12 Jul 2016 18:41:05 -0400 From: Arnaldo Carvalho de Melo To: Ingo Molnar Cc: linux-kernel@vger.kernel.org, Arnaldo Carvalho de Melo , Adrian Hunter , Chris Phlipot , David Ahern , Jiri Olsa , Namhyung Kim , Wang Nan Subject: [PATCH 46/66] perf tools: Fallback to reading sysfs to get cacheline size Date: Tue, 12 Jul 2016 19:40:21 -0300 Message-Id: <1468363241-14555-47-git-send-email-acme@kernel.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1468363241-14555-1-git-send-email-acme@kernel.org> References: <1468363241-14555-1-git-send-email-acme@kernel.org> X-SRS-Rewrite: SMTP reverse-path rewritten from by bombadil.infradead.org. See http://www.infradead.org/rpr.html Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Arnaldo Carvalho de Melo On systems where sysconf(_SC_LEVEL1_DCACHE_LINESIZE) is not available, such as musl LIBC and Android's bionic libc. Cc: Adrian Hunter Cc: Chris Phlipot Cc: David Ahern Cc: Jiri Olsa Cc: Namhyung Kim Cc: Wang Nan Link: http://lkml.kernel.org/n/tip-772obxzby758g7m2wmzcejxz@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo --- tools/perf/perf.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/tools/perf/perf.c b/tools/perf/perf.c index f7d7dbbd2af6..4b2ff021434c 100644 --- a/tools/perf/perf.c +++ b/tools/perf/perf.c @@ -497,6 +497,16 @@ void pthread__unblock_sigwinch(void) pthread_sigmask(SIG_UNBLOCK, &set, NULL); } +#ifdef _SC_LEVEL1_DCACHE_LINESIZE +#define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE) +#else +static void cache_line_size(int *cacheline_sizep) +{ + if (sysfs__read_int("devices/system/cpu/cpu0/cache/index0/coherency_line_size", cacheline_sizep)) + perror("cannot determine cache line size"); +} +#endif + int main(int argc, const char **argv) { const char *cmd; @@ -509,7 +519,7 @@ int main(int argc, const char **argv) /* The page_size is placed in util object. */ page_size = sysconf(_SC_PAGE_SIZE); - cacheline_size = sysconf(_SC_LEVEL1_DCACHE_LINESIZE); + cache_line_size(&cacheline_size); if (sysctl__read_int("kernel/perf_event_max_stack", &value) == 0) sysctl_perf_event_max_stack = value; -- 2.7.4