From: Girish Mahadevan <girishm@codeaurora.org>
To: broonie@kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: sboyd@codeaurora.org, sdharia@codeaurora.org,
girishm@codeaurora.org, linux-arm-msm@vger.kernel.org
Subject: [PATCH RFCv1 0/1] Update struct spi_transfer to specify 8x bit transfers
Date: Wed, 13 Jul 2016 13:34:36 -0600 [thread overview]
Message-ID: <1468438477-18883-1-git-send-email-girishm@codeaurora.org> (raw)
We’re working on a driver for a Quad SPI controller [using up to 4 data lines] which can use dual-data-sampling to implement 8-bit transfers. To allow a slave driver to specify the 8-bit transfer we'd like to make this change to the spi_transfer data structure. We are still working on the driver we will send an RFC for the driver patches separately once it is ready.
Girish Mahadevan (1):
spi: Expand tx_nbits/rx_nbits to add 8-bit transfer
include/linux/spi/spi.h | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
--
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project
next reply other threads:[~2016-07-13 19:35 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-13 19:34 Girish Mahadevan [this message]
2016-07-13 19:34 ` [PATCH RFCv1 1/1] spi: Expand tx_nbits/rx_nbits to add 8-bit transfer Girish Mahadevan
2016-08-05 17:57 ` Mark Brown
2016-07-14 13:30 ` [PATCH RFCv1 0/1] Update struct spi_transfer to specify 8x bit transfers Mark Brown
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