From: Kishon Vijay Abraham I <kishon@ti.com>
To: Marc Zyngier <maz@kernel.org>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Tom Joseph <tjoseph@cadence.com>, <linux-omap@vger.kernel.org>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
Lokesh Vutla <lokeshvutla@ti.com>
Subject: Re: [PATCH v2 1/3] dt-bindings: PCI: ti,j721e: Add bindings to specify legacy interrupts
Date: Mon, 9 Aug 2021 10:08:47 +0530 [thread overview]
Message-ID: <14717d53-1727-509c-9a62-02c1e8c5736e@ti.com> (raw)
In-Reply-To: <87im0lw8qy.wl-maz@kernel.org>
Hi Marc,
On 04/08/21 8:35 pm, Marc Zyngier wrote:
> On Wed, 04 Aug 2021 14:29:10 +0100,
> Kishon Vijay Abraham I <kishon@ti.com> wrote:
>>
>> Add bindings to specify interrupt controller for legacy interrupts.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
>> ---
>> .../bindings/pci/ti,j721e-pci-host.yaml | 15 +++++++++++++++
>> 1 file changed, 15 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
>> index cc900202df29..f461d7b4c0cc 100644
>> --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
>> +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml
>> @@ -74,6 +74,11 @@ properties:
>>
>> msi-map: true
>>
>> +patternProperties:
>> + "interrupt-controller":
>> + type: object
>> + description: interrupt controller to handle legacy interrupts.
>> +
>> required:
>> - compatible
>> - reg
>> @@ -97,6 +102,8 @@ unevaluatedProperties: false
>>
>> examples:
>> - |
>> + #include <dt-bindings/interrupt-controller/arm-gic.h>
>> + #include <dt-bindings/interrupt-controller/irq.h>
>> #include <dt-bindings/soc/ti,sci_pm_domain.h>
>> #include <dt-bindings/gpio/gpio.h>
>>
>> @@ -131,5 +138,13 @@ examples:
>> ranges = <0x01000000 0x0 0x10001000 0x00 0x10001000 0x0 0x0010000>,
>> <0x02000000 0x0 0x10011000 0x00 0x10011000 0x0 0x7fef000>;
>> dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>;
>> +
>> +
>> + pcie0_intc: interrupt-controller {
>> + interrupt-controller;
>> + #interrupt-cells = <1>;
>> + interrupt-parent = <&gic500>;
>> + interrupts = <GIC_SPI 312 IRQ_TYPE_EDGE_RISING>;
>
> Are you sure about the edge signalling? How is the interrupt
> retriggered when the input is still high, which could well be the case
> for shared INTx?
There is a EOI register which is used for re-triggering the interrupt.
That functionality is broken in J721E but is fixed in J7200 (the
following two patches in the series deals with that).
Thanks,
Kishon
next prev parent reply other threads:[~2021-08-09 4:39 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-04 13:29 [PATCH v2 0/3] PCI: Add legacy interrupt support in pci-j721e Kishon Vijay Abraham I
2021-08-04 13:29 ` [PATCH v2 1/3] dt-bindings: PCI: ti,j721e: Add bindings to specify legacy interrupts Kishon Vijay Abraham I
2021-08-04 15:05 ` Marc Zyngier
2021-08-09 4:38 ` Kishon Vijay Abraham I [this message]
2021-08-13 17:17 ` Rob Herring
2021-08-18 13:58 ` Kishon Vijay Abraham I
2021-09-23 4:33 ` Kishon Vijay Abraham I
2021-09-23 15:44 ` Rob Herring
2021-08-04 13:29 ` [PATCH v2 2/3] PCI: j721e: Add PCI legacy interrupt support for J721E Kishon Vijay Abraham I
2021-08-04 15:13 ` Marc Zyngier
2021-08-09 4:50 ` Kishon Vijay Abraham I
2021-08-09 9:39 ` Marc Zyngier
2021-08-09 14:58 ` Kishon Vijay Abraham I
2021-08-10 12:33 ` Marc Zyngier
2021-08-11 12:07 ` Kishon Vijay Abraham I
2021-08-04 13:29 ` [PATCH v2 3/3] PCI: j721e: Add PCI legacy interrupt support for J7200 Kishon Vijay Abraham I
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