From: Florent Revest <florent.revest@free-electrons.com>
To: linux-media@vger.kernel.org
Cc: florent.revest@free-electrons.com, linux-sunxi@googlegroups.com,
maxime.ripard@free-electrons.com, posciak@chromium.org,
hans.verkuil@cisco.com, thomas.petazzoni@free-electrons.com,
mchehab@kernel.org, linux-kernel@vger.kernel.org, wens@csie.org
Subject: [RFC 10/10] sunxi-cedrus: Add device tree binding document
Date: Thu, 25 Aug 2016 11:39:49 +0200 [thread overview]
Message-ID: <1472117989-21455-11-git-send-email-florent.revest@free-electrons.com> (raw)
In-Reply-To: <1472117989-21455-1-git-send-email-florent.revest@free-electrons.com>
Device Tree bindings for the Allwinner's video engine
Signed-off-by: Florent Revest <florent.revest@free-electrons.com>
---
.../devicetree/bindings/media/sunxi-cedrus.txt | 44 ++++++++++++++++++++++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/sunxi-cedrus.txt
diff --git a/Documentation/devicetree/bindings/media/sunxi-cedrus.txt b/Documentation/devicetree/bindings/media/sunxi-cedrus.txt
new file mode 100644
index 0000000..26f2e09
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/sunxi-cedrus.txt
@@ -0,0 +1,44 @@
+Device-Tree bindings for SUNXI video engine found in sunXi SoC family
+
+Required properties:
+- compatible : "allwinner,sun5i-a13-video-engine";
+- memory-region : DMA pool for buffers allocation;
+- clocks : list of clock specifiers, corresponding to
+ entries in clock-names property;
+- clock-names : should contain "ahb", "mod" and "ram" entries;
+- resets : phandle for reset;
+- interrupts : should contain VE interrupt number;
+- reg : should contain register base and length of VE.
+
+Example:
+
+reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ ve_reserved: cma {
+ compatible = "shared-dma-pool";
+ reg = <0x43d00000 0x9000000>;
+ no-map;
+ linux,cma-default;
+ };
+};
+
+video-engine {
+ compatible = "allwinner,sun5i-a13-video-engine";
+ memory-region = <&ve_reserved>;
+
+ clocks = <&ahb_gates 32>, <&ccu CLK_VE>,
+ <&dram_gates 0>;
+ clock-names = "ahb", "mod", "ram";
+
+ assigned-clocks = <&ccu CLK_VE>;
+ assigned-clock-rates = <320000000>;
+
+ resets = <&ccu RST_VE>;
+
+ interrupts = <53>;
+
+ reg = <0x01c0e000 4096>;
+};
--
2.7.4
next prev parent reply other threads:[~2016-08-25 9:40 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-25 9:39 [RFC 00/10] Add Sunxi Cedrus Video Decoder Driver Florent Revest
2016-08-25 9:39 ` [RFC 01/10] clk: sunxi-ng: Add a couple of A13 clocks Florent Revest
2016-08-25 9:39 ` [RFC 02/10] v4l: Add private compound control type Florent Revest
2016-08-25 9:39 ` [RFC 03/10] v4l: Add sunxi Video Engine pixel format Florent Revest
2016-11-14 10:01 ` Hans Verkuil
2016-08-25 9:39 ` [RFC 04/10] v4l: Add MPEG2 low-level decoder API control Florent Revest
2016-08-25 9:39 ` [RFC 05/10] v4l: Add MPEG4 " Florent Revest
2016-08-25 9:39 ` [RFC 06/10] media: platform: Add Sunxi Cedrus decoder driver Florent Revest
2016-11-14 10:07 ` Hans Verkuil
2016-08-25 9:39 ` [RFC 07/10] sunxi-cedrus: Add a MPEG 2 codec Florent Revest
2016-11-14 10:18 ` Hans Verkuil
2016-11-14 10:28 ` Hans Verkuil
2016-08-25 9:39 ` [RFC 08/10] sunxi-cedrus: Add a MPEG 4 codec Florent Revest
2016-08-25 9:39 ` [RFC 09/10] ARM: dts: sun5i: Use video-engine node Florent Revest
2016-08-25 9:39 ` Florent Revest [this message]
2016-08-25 12:12 ` [RFC 00/10] Add Sunxi Cedrus Video Decoder Driver Stefan Monnier
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