From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932235AbcHZO7a (ORCPT ); Fri, 26 Aug 2016 10:59:30 -0400 Received: from mail-wm0-f54.google.com ([74.125.82.54]:35884 "EHLO mail-wm0-f54.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754272AbcHZO5l (ORCPT ); Fri, 26 Aug 2016 10:57:41 -0400 From: Peter Griffin To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@stlinux.com, vinod.koul@intel.com, patrice.chotard@st.com, dan.j.williams@intel.com, airlied@linux.ie, kraxel@redhat.com, ohad@wizery.com, bjorn.andersson@linaro.org Cc: peter.griffin@linaro.org, lee.jones@linaro.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, virtualization@lists.linux-foundation.org, linux-remoteproc@vger.kernel.org, Arnaud Pouliquen Subject: [PATCH v8 11/18] ARM: DT: STiH407: Add i2s_in pinctrl configuration Date: Fri, 26 Aug 2016 15:56:46 +0100 Message-Id: <1472223413-7254-12-git-send-email-peter.griffin@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1472223413-7254-1-git-send-email-peter.griffin@linaro.org> References: <1472223413-7254-1-git-send-email-peter.griffin@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the pinctrl config for the i2s_in pins used by the uniperif reader IP. Signed-off-by: Arnaud Pouliquen Signed-off-by: Peter Griffin --- arch/arm/boot/dts/stih407-pinctrl.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi index 0fb5c8a..537db7e 100644 --- a/arch/arm/boot/dts/stih407-pinctrl.dtsi +++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi @@ -1090,6 +1090,30 @@ }; }; + i2s_in { + pinctrl_i2s_8ch_in: i2s_8ch_in{ + st,pins { + mclk = <&pio32 5 ALT1 IN>; + lrclk = <&pio32 7 ALT1 IN>; + sclk = <&pio32 6 ALT1 IN>; + data0 = <&pio32 4 ALT1 IN>; + data1 = <&pio33 0 ALT1 IN>; + data2 = <&pio33 1 ALT1 IN>; + data3 = <&pio33 2 ALT1 IN>; + data4 = <&pio33 3 ALT1 IN>; + }; + }; + + pinctrl_i2s_2ch_in: i2s_2ch_in{ + st,pins { + mclk = <&pio32 5 ALT1 IN>; + lrclk = <&pio32 7 ALT1 IN>; + sclk = <&pio32 6 ALT1 IN>; + data0 = <&pio32 4 ALT1 IN>; + }; + }; + }; + serial3 { pinctrl_serial3: serial3-0 { st,pins { -- 1.9.1