From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932636AbcH1VCV (ORCPT ); Sun, 28 Aug 2016 17:02:21 -0400 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:48311 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932592AbcH1VCQ (ORCPT ); Sun, 28 Aug 2016 17:02:16 -0400 X-IBM-Helo: d28dlp01.in.ibm.com X-IBM-MailFrom: maddy@linux.vnet.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org From: Madhavan Srinivasan To: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Cc: Madhavan Srinivasan , Thomas Gleixner , Ingo Molnar , Peter Zijlstra , Jiri Olsa , Arnaldo Carvalho de Melo , Stephane Eranian , Russell King , Catalin Marinas , Will Deacon , Benjamin Herrenschmidt , Michael Ellerman , Sukadev Bhattiprolu Subject: [PATCH 09/13] powerpc/perf: Add support for perf_arch_regs for PPC970 processor Date: Mon, 29 Aug 2016 02:30:54 +0530 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472418058-28659-1-git-send-email-maddy@linux.vnet.ibm.com> References: <1472418058-28659-1-git-send-email-maddy@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16082821-0056-0000-0000-000002DB1136 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16082821-0057-0000-0000-00000FB66DA3 Message-Id: <1472418058-28659-10-git-send-email-maddy@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-08-28_10:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1608280206 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add code to define support functions and registers mask for PPC970 processor. Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Peter Zijlstra Cc: Jiri Olsa Cc: Arnaldo Carvalho de Melo Cc: Stephane Eranian Cc: Russell King Cc: Catalin Marinas Cc: Will Deacon Cc: Benjamin Herrenschmidt Cc: Michael Ellerman Cc: Sukadev Bhattiprolu Signed-off-by: Madhavan Srinivasan --- arch/powerpc/perf/ppc970-pmu.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/powerpc/perf/ppc970-pmu.c b/arch/powerpc/perf/ppc970-pmu.c index 8b6a8a36fa38..0b3121335bf0 100644 --- a/arch/powerpc/perf/ppc970-pmu.c +++ b/arch/powerpc/perf/ppc970-pmu.c @@ -12,6 +12,7 @@ #include #include #include +#include /* * Bits in event code for PPC970 @@ -474,6 +475,26 @@ static int ppc970_cache_events[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { }, }; +#define PPC970_ARCH_REGS_MASK (PERF_ARCH_REG_PVR |\ + PERF_ARCH_REG_PMC1 | PERF_ARCH_REG_PMC2 |\ + PERF_ARCH_REG_PMC3 | PERF_ARCH_REG_PMC4 |\ + PERF_ARCH_REG_PMC5 | PERF_ARCH_REG_PMC6 |\ + PERF_ARCH_REG_MMCR0 | PERF_ARCH_REG_MMCR1 | PERF_ARCH_REG_MMCRA) + +static void ppc970_get_arch_regs(struct perf_arch_regs *regs) +{ + regs->regs[PERF_ARCH_REG_POWERPC_PVR] = mfspr(SPRN_PVR); + regs->regs[PERF_ARCH_REG_POWERPC_PMC1] = mfspr(SPRN_PMC1); + regs->regs[PERF_ARCH_REG_POWERPC_PMC2] = mfspr(SPRN_PMC2); + regs->regs[PERF_ARCH_REG_POWERPC_PMC3] = mfspr(SPRN_PMC3); + regs->regs[PERF_ARCH_REG_POWERPC_PMC4] = mfspr(SPRN_PMC4); + regs->regs[PERF_ARCH_REG_POWERPC_PMC5] = mfspr(SPRN_PMC5); + regs->regs[PERF_ARCH_REG_POWERPC_PMC6] = mfspr(SPRN_PMC6); + regs->regs[PERF_ARCH_REG_POWERPC_MMCR0] = mfspr(SPRN_MMCR0); + regs->regs[PERF_ARCH_REG_POWERPC_MMCR1] = mfspr(SPRN_MMCR1); + regs->regs[PERF_ARCH_REG_POWERPC_MMCRA] = mfspr(SPRN_MMCRA); +} + static struct power_pmu ppc970_pmu = { .name = "PPC970/FX/MP", .n_counter = 8, @@ -488,6 +509,8 @@ static struct power_pmu ppc970_pmu = { .generic_events = ppc970_generic_events, .cache_events = &ppc970_cache_events, .flags = PPMU_NO_SIPR | PPMU_NO_CONT_SAMPLING, + .ar_mask = PPC970_ARCH_REGS_MASK, + .get_arch_regs = ppc970_get_arch_regs, }; static int __init init_ppc970_pmu(void) -- 2.7.4