From: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com>
To: <robh@kernel.org>, <bhelgaas@google.com>,
<colin.king@canonical.com>, <soren.brinkmann@xilinx.com>,
<marc.zyngier@arm.com>, <michal.simek@xilinx.com>,
<arnd@arndb.de>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<rgummal@xilinx.com>, Bharat Kumar Gogada <bharatku@xilinx.com>
Subject: [PATCH 2/3] PCI: Xilinx NWL PCIe: Enabling all MSI interrupts using MSI mask.
Date: Tue, 30 Aug 2016 16:09:17 +0530 [thread overview]
Message-ID: <1472553558-27215-2-git-send-email-bharatku@xilinx.com> (raw)
In-Reply-To: <1472553558-27215-1-git-send-email-bharatku@xilinx.com>
The current mask enables and allows only one MSI interrupt on each MSI line.
This change, enables all MSI interrupts, which will also support End Points
with multi MSI support.
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
---
drivers/pci/host/pcie-xilinx-nwl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/host/pcie-xilinx-nwl.c b/drivers/pci/host/pcie-xilinx-nwl.c
index 86c1834..d8d43e6 100644
--- a/drivers/pci/host/pcie-xilinx-nwl.c
+++ b/drivers/pci/host/pcie-xilinx-nwl.c
@@ -120,8 +120,8 @@
MSGF_LEG_SR_INTC | MSGF_LEG_SR_INTD)
/* MSI interrupt status mask bits */
-#define MSGF_MSI_SR_LO_MASK BIT(0)
-#define MSGF_MSI_SR_HI_MASK BIT(0)
+#define MSGF_MSI_SR_LO_MASK GENMASK(31, 0)
+#define MSGF_MSI_SR_HI_MASK GENMASK(31, 0)
#define MSII_PRESENT BIT(0)
#define MSII_ENABLE BIT(0)
--
2.1.1
next prev parent reply other threads:[~2016-08-30 12:12 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-30 10:39 [PATCH 1/3] PCI: Xilinx NWL PCIe: Expanding PCIe core errors and printing event occurred Bharat Kumar Gogada
2016-08-30 10:39 ` Bharat Kumar Gogada [this message]
2016-08-30 10:39 ` [PATCH 3/3] PCI: Xilinx NWL PCIe: Fix Error for multi function device for legacy interrupts Bharat Kumar Gogada
2016-08-30 12:17 ` Marc Zyngier
2016-08-30 14:13 ` Bharat Kumar Gogada
2016-08-30 15:02 ` Marc Zyngier
2016-08-31 9:56 ` Bharat Kumar Gogada
2016-08-31 10:56 ` Marc Zyngier
2016-09-01 5:19 ` Bharat Kumar Gogada
2016-09-12 22:02 ` Bjorn Helgaas
2016-09-13 7:41 ` Marc Zyngier
2016-09-13 15:05 ` Bjorn Helgaas
2016-09-13 15:34 ` Bjorn Helgaas
2016-09-13 15:50 ` Thomas Petazzoni
2016-09-14 5:34 ` Bharat Kumar Gogada
2016-09-14 9:55 ` Kishon Vijay Abraham I
2017-03-02 8:46 ` Bharat Kumar Gogada
2016-09-13 14:32 ` [PATCH 1/3] PCI: Xilinx NWL PCIe: Expanding PCIe core errors and printing event occurred Bjorn Helgaas
2016-09-14 5:26 ` Bharat Kumar Gogada
2016-09-13 15:18 ` Bjorn Helgaas
2016-09-14 5:28 ` Bharat Kumar Gogada
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