From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760299AbcHaKrf (ORCPT ); Wed, 31 Aug 2016 06:47:35 -0400 Received: from mailapp01.imgtec.com ([195.59.15.196]:57315 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757702AbcHaKpA (ORCPT ); Wed, 31 Aug 2016 06:45:00 -0400 From: Matt Redfearn To: Ralf Baechle CC: , Matt Redfearn , Adam Buchbinder , Masahiro Yamada , Kees Cook , , Markos Chandras , Paul Burton Subject: [PATCH 05/10] MIPS: pm-cps: Add P6600 implementation lightweight sync types Date: Wed, 31 Aug 2016 11:44:34 +0100 Message-ID: <1472640279-26593-6-git-send-email-matt.redfearn@imgtec.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1472640279-26593-1-git-send-email-matt.redfearn@imgtec.com> References: <1472640279-26593-1-git-send-email-matt.redfearn@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.150.130.83] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org P6600 implements the same lightweight sync types as previous CPUs. Signed-off-by: Matt Redfearn Reviewed-by: Paul Burton --- arch/mips/kernel/pm-cps.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c index c6b9ad2256f0..f8c8edd0a451 100644 --- a/arch/mips/kernel/pm-cps.c +++ b/arch/mips/kernel/pm-cps.c @@ -674,6 +674,7 @@ static int __init cps_pm_init(void) case CPU_PROAPTIV: case CPU_M5150: case CPU_P5600: + case CPU_P6600: stype_intervention = 0x2; stype_memory = 0x3; stype_ordering = 0x10; -- 2.7.4