From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933907AbcIEQdO (ORCPT ); Mon, 5 Sep 2016 12:33:14 -0400 Received: from fw-tnat.cambridge.arm.com ([217.140.96.140]:28923 "EHLO cam-smtp0.cambridge.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S933839AbcIEQdG (ORCPT ); Mon, 5 Sep 2016 12:33:06 -0400 From: Punit Agrawal To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: Mark Rutland , Christoffer Dall , Marc Zyngier , Steven Rostedt , Ingo Molnar , Will Deacon , Punit Agrawal Subject: [RFC v2 PATCH 5/7] arm64/kvm: hyp: tlb: use __tlbi() helper Date: Mon, 5 Sep 2016 17:31:35 +0100 Message-Id: <1473093097-30932-6-git-send-email-punit.agrawal@arm.com> X-Mailer: git-send-email 2.8.1 In-Reply-To: <1473093097-30932-1-git-send-email-punit.agrawal@arm.com> References: <1473093097-30932-1-git-send-email-punit.agrawal@arm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Mark Rutland Now that we have a __tlbi() helper, make use of this in the arm64 KVM hyp code to get rid of asm() boilerplate. At the same time, we simplify __tlb_flush_vm_context by using __flush_icache_all(), as this has the appropriate instruction cache maintenance and barrier. Signed-off-by: Mark Rutland Cc: Marc Zyngier [ rename tlbi -> __tlbi, convert additional sites, update commit log ] Signed-off-by: Punit Agrawal --- arch/arm64/kvm/hyp/tlb.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kvm/hyp/tlb.c b/arch/arm64/kvm/hyp/tlb.c index be8177c..4cda100 100644 --- a/arch/arm64/kvm/hyp/tlb.c +++ b/arch/arm64/kvm/hyp/tlb.c @@ -16,6 +16,7 @@ */ #include +#include static void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) { @@ -32,7 +33,7 @@ static void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * whole of Stage-1. Weep... */ ipa >>= 12; - asm volatile("tlbi ipas2e1is, %0" : : "r" (ipa)); + __tlbi(ipas2e1is, ipa); /* * We have to ensure completion of the invalidation at Stage-2, @@ -41,7 +42,7 @@ static void __hyp_text __tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa) * the Stage-1 invalidation happened first. */ dsb(ish); - asm volatile("tlbi vmalle1is" : : ); + __tlbi(vmalle1is); dsb(ish); isb(); @@ -60,7 +61,7 @@ static void __hyp_text __tlb_flush_vmid(struct kvm *kvm) write_sysreg(kvm->arch.vttbr, vttbr_el2); isb(); - asm volatile("tlbi vmalls12e1is" : : ); + __tlbi(vmalls12e1is); dsb(ish); isb(); @@ -72,9 +73,8 @@ __alias(__tlb_flush_vmid) void __kvm_tlb_flush_vmid(struct kvm *kvm); static void __hyp_text __tlb_flush_vm_context(void) { dsb(ishst); - asm volatile("tlbi alle1is \n" - "ic ialluis ": : ); - dsb(ish); + __tlbi(alle1is); + __flush_icache_all(); /* contains a dsb(ish) */ } __alias(__tlb_flush_vm_context) void __kvm_flush_vm_context(void); -- 2.8.1