From: CK Hu <ck.hu@mediatek.com>
To: YT Shen <yt.shen@mediatek.com>
Cc: <dri-devel@lists.freedesktop.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>,
Matthias Brugger <matthias.bgg@gmail.com>,
Daniel Kurtz <djkurtz@chromium.org>,
Mao Huang <littlecvr@chromium.org>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
"Daniel Vetter" <daniel.vetter@ffwll.ch>,
Thierry Reding <thierry.reding@gmail.com>,
Jie Qiu <jie.qiu@mediatek.com>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Chris Wilson <chris@chris-wilson.co.uk>,
shaoming chen <shaoming.chen@mediatek.com>,
Jitao Shi <jitao.shi@mediatek.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Dan Carpenter <dan.carpenter@oracle.com>,
<linux-arm-kernel@lists.infradead.org>,
<linux-mediatek@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <srv_heupstream@mediatek.com>,
Sascha Hauer <kernel@pengutronix.de>, <yingjoe.chen@mediatek.com>,
<emil.l.velikov@gmail.com>
Subject: Re: [PATCH v7 4/9] drm/mediatek: update display module connections
Date: Tue, 6 Sep 2016 15:39:06 +0800 [thread overview]
Message-ID: <1473147546.11736.7.camel@mtksdaap41> (raw)
In-Reply-To: <1472815484-43821-5-git-send-email-yt.shen@mediatek.com>
Hi, YT:
On Fri, 2016-09-02 at 19:24 +0800, YT Shen wrote:
> update connections for OVL, RDMA, BLS, DSI
>
> Signed-off-by: YT Shen <yt.shen@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
[snip...]
> @@ -111,6 +119,9 @@ static unsigned int mtk_ddp_mout_en(enum mtk_ddp_comp_id cur,
> if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_COLOR0) {
> *addr = DISP_REG_CONFIG_DISP_OVL0_MOUT_EN;
> value = OVL0_MOUT_EN_COLOR0;
> + } else if (cur == DDP_COMPONENT_OVL0 && next == DDP_COMPONENT_RDMA0) {
> + *addr = DISP_REG_CONFIG_DISP_OVL_MOUT_EN;
> + value = OVL_MOUT_EN_RDMA;
> } else if (cur == DDP_COMPONENT_OD && next == DDP_COMPONENT_RDMA0) {
> *addr = DISP_REG_CONFIG_DISP_OD_MOUT_EN;
> value = OD_MOUT_EN_RDMA0;
> @@ -148,6 +159,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
> } else if (cur == DDP_COMPONENT_OVL1 && next == DDP_COMPONENT_COLOR1) {
> *addr = DISP_REG_CONFIG_DISP_COLOR1_SEL_IN;
> value = COLOR1_SEL_IN_OVL1;
> + } else if (cur == DDP_COMPONENT_BLS && next == DDP_COMPONENT_DSI0) {
DDP_COMPONENT_BLS is a new symbol which is defined in 9th patch of this
series. I think the definition of DDP_COMPONENT_BLS should be in front
of this patch.
> + *addr = DISP_REG_CONFIG_DSI_SEL;
> + value = DSI_SEL_IN_BLS;
> } else {
> value = 0;
> }
> @@ -155,6 +169,15 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
> return value;
> }
>
Regards,
CK
next prev parent reply other threads:[~2016-09-06 7:39 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-02 11:24 [PATCH v7 0/9] MT2701 DRM support YT Shen
2016-09-02 11:24 ` [PATCH v7 1/9] drm/mediatek: rename macros, add chip prefix YT Shen
2016-09-02 11:24 ` [PATCH v7 2/9] drm/mediatek: add *driver_data for different hardware settings YT Shen
2016-09-06 7:26 ` CK Hu
2016-09-02 11:24 ` [PATCH v7 3/9] drm/mediatek: add shadow register support YT Shen
2016-09-02 11:24 ` [PATCH v7 4/9] drm/mediatek: update display module connections YT Shen
2016-09-06 7:39 ` CK Hu [this message]
2016-09-12 10:16 ` YT Shen
2016-09-02 11:24 ` [PATCH v7 5/9] drm/mediatek: cleaning up and refine YT Shen
2016-09-02 11:24 ` [PATCH v7 6/9] drm/mediatek: add dsi interrupt control YT Shen
2016-09-07 1:39 ` CK Hu
2016-09-12 10:16 ` YT Shen
2016-09-02 11:24 ` [PATCH v7 7/9] drm/mediatek: add dsi transfer function YT Shen
2016-09-07 2:33 ` CK Hu
2016-09-12 10:16 ` YT Shen
2016-09-13 9:25 ` CK Hu
2016-09-14 6:19 ` YT Shen
2016-09-14 6:39 ` CK Hu
2016-09-14 7:22 ` YT Shen
2016-09-14 7:34 ` CK Hu
2016-09-02 11:24 ` [PATCH v7 8/9] drm/mediatek: update DSI sub driver flow YT Shen
2016-09-07 4:58 ` CK Hu
2016-09-12 10:15 ` YT Shen
2016-09-13 9:59 ` CK Hu
2016-09-02 11:24 ` [PATCH v7 9/9] drm/mediatek: add support for Mediatek SoC MT2701 YT Shen
2016-09-07 5:37 ` CK Hu
2016-09-12 10:16 ` YT Shen
2016-09-13 5:32 ` CK Hu
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