From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933591AbcI3O0M (ORCPT ); Fri, 30 Sep 2016 10:26:12 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:35346 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932561AbcI3O0E (ORCPT ); Fri, 30 Sep 2016 10:26:04 -0400 From: To: Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , Michael Turquette , Stephen Boyd CC: , , , , , , , Subject: [PATCH 0/6] STM32F4 Add RTC & QSPI clocks Date: Fri, 30 Sep 2016 16:25:03 +0200 Message-ID: <1475245509-6487-1-git-send-email-gabriel.fernandez@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.1.80] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-09-30_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gabriel Fernandez This patch-set introduce RTC and QSPI clocks for STM32F4 socs RTC clock has 3 parents clock oscillators (lsi/lse/hse_rtc) example to use rtc clock: rtc: rtc@40002800 { compatible = "st,stm32-rtc"; reg = <0x40002800 0x400>; ... clocks = <&rcc 1 CLK_RTC>; assigned-clocks = <&rcc 1 CLK_RTC>; assigned-clock-parents = <&rcc 1 CLK_LSE>; ... }; Gabriel Fernandez (6): clk: stm32f4: Add LSI & LSE clocks ARM: dts: stm32f429: add LSI and LSE clocks arm: stmf32: Enable SYSCON clk: stm32f4: Add RTC clock clk: stm32f469: Add QSPI clock ARM: dts: stm32f429: Add QSPI clock .../devicetree/bindings/clock/st,stm32-rcc.txt | 4 +- arch/arm/boot/dts/stm32f429.dtsi | 18 + arch/arm/boot/dts/stm32f469-disco.dts | 4 + arch/arm/configs/stm32_defconfig | 1 + drivers/clk/clk-stm32f4.c | 450 ++++++++++++++++++++- 5 files changed, 455 insertions(+), 22 deletions(-) -- 1.9.1