From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933634AbcI3O0U (ORCPT ); Fri, 30 Sep 2016 10:26:20 -0400 Received: from mx07-00178001.pphosted.com ([62.209.51.94]:24166 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933050AbcI3O0E (ORCPT ); Fri, 30 Sep 2016 10:26:04 -0400 From: To: Rob Herring , Mark Rutland , Russell King , Maxime Coquelin , Alexandre Torgue , Michael Turquette , Stephen Boyd CC: , , , , , , , Subject: [PATCH 3/6] arm: stmf32: Enable SYSCON Date: Fri, 30 Sep 2016 16:25:06 +0200 Message-ID: <1475245509-6487-4-git-send-email-gabriel.fernandez@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1475245509-6487-1-git-send-email-gabriel.fernandez@st.com> References: <1475245509-6487-1-git-send-email-gabriel.fernandez@st.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.48.1.80] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-09-30_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Gabriel Fernandez The clock drivers needs to disable the power domain write protection using syscon/regmap to enable RTC clock. Signed-off-by: Gabriel Fernandez --- arch/arm/configs/stm32_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig index 08786d8..f3b1ea5 100644 --- a/arch/arm/configs/stm32_defconfig +++ b/arch/arm/configs/stm32_defconfig @@ -49,6 +49,7 @@ CONFIG_SERIAL_STM32=y CONFIG_SERIAL_STM32_CONSOLE=y # CONFIG_HW_RANDOM is not set # CONFIG_HWMON is not set +CONFIG_MFD_SYSCON=y # CONFIG_USB_SUPPORT is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y -- 1.9.1