From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
To: rjw@rjwysocki.net, tglx@linutronix.de, mingo@redhat.com, bp@suse.de
Cc: x86@kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org,
peterz@infradead.org, tim.c.chen@linux.intel.com,
jolsa@redhat.com,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Subject: [PATCH v5 6/9] x86/sched: Add SD_ASYM_PACKING flags to x86 ITMT CPU
Date: Sat, 1 Oct 2016 04:45:23 -0700 [thread overview]
Message-ID: <1475322326-160112-7-git-send-email-srinivas.pandruvada@linux.intel.com> (raw)
In-Reply-To: <1475322326-160112-1-git-send-email-srinivas.pandruvada@linux.intel.com>
From: Tim Chen <tim.c.chen@linux.intel.com>
Some Intel cores in a package can be boosted to a higher turbo frequency
with ITMT 3.0 technology. The scheduler can use the asymmetric packing
feature to move tasks to the more capable cores.
If ITMT is enabled, add SD_ASYM_PACKING flag to the thread and core
sched domains to enable asymmetric packing.
Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
arch/x86/kernel/smpboot.c | 28 ++++++++++++++++++++++++----
1 file changed, 24 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 38901b3..607cbe6 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -487,22 +487,42 @@ static bool match_die(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o)
return false;
}
+#if defined(CONFIG_SCHED_SMT) || defined(CONFIG_SCHED_MC)
+static inline int x86_sched_itmt_flags(void)
+{
+ return sysctl_sched_itmt_enabled ? SD_ASYM_PACKING : 0;
+}
+
+#ifdef CONFIG_SCHED_MC
+static int x86_core_flags(void)
+{
+ return cpu_core_flags() | x86_sched_itmt_flags();
+}
+#endif
+#ifdef CONFIG_SCHED_SMT
+static int x86_smt_flags(void)
+{
+ return cpu_smt_flags() | x86_sched_itmt_flags();
+}
+#endif
+#endif
+
static struct sched_domain_topology_level x86_numa_in_package_topology[] = {
#ifdef CONFIG_SCHED_SMT
- { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+ { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
#endif
#ifdef CONFIG_SCHED_MC
- { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+ { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
#endif
{ NULL, },
};
static struct sched_domain_topology_level x86_topology[] = {
#ifdef CONFIG_SCHED_SMT
- { cpu_smt_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
+ { cpu_smt_mask, x86_smt_flags, SD_INIT_NAME(SMT) },
#endif
#ifdef CONFIG_SCHED_MC
- { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
+ { cpu_coregroup_mask, x86_core_flags, SD_INIT_NAME(MC) },
#endif
{ cpu_cpu_mask, SD_INIT_NAME(DIE) },
{ NULL, },
--
2.7.4
next prev parent reply other threads:[~2016-10-01 11:47 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-01 11:45 [PATCH v5 0/9] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 1/9] sched: Extend scheduler's asym packing Srinivas Pandruvada
2016-10-01 16:38 ` Nilay Vaish
2016-10-03 16:49 ` Tim Chen
2016-10-01 11:45 ` [PATCH v5 2/9] x86/topology: Provide topology_num_packages() Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 3/9] x86/topology: Define x86's arch_update_cpu_topology Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 4/9] x86: Enable Intel Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-10-05 14:23 ` Thomas Gleixner
2016-10-05 16:05 ` Tim Chen
2016-10-01 11:45 ` [PATCH v5 5/9] x86/sysctl: Add sysctl for ITMT scheduling feature Srinivas Pandruvada
2016-10-05 14:35 ` Thomas Gleixner
2016-10-05 16:24 ` Tim Chen
2016-10-06 11:13 ` Thomas Gleixner
2016-10-06 17:37 ` Tim Chen
2016-10-12 16:50 ` Tim Chen
2016-10-01 11:45 ` Srinivas Pandruvada [this message]
2016-10-01 11:45 ` [PATCH v5 7/9] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 8/9] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
2016-10-01 11:45 ` [PATCH v5 9/9] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
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