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Subject: Re: [PATCH RFC 2/5] x86,fpu: delay FPU register loading until
 switch to userspace
From: Rik van Riel <riel@redhat.com>
To: Andy Lutomirski <luto@amacapital.net>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        X86 ML <x86@kernel.org>, Thomas Gleixner <tglx@linutronix.de>,
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Date: Sat, 01 Oct 2016 20:42:36 -0400
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On Sat, 2016-10-01 at 16:44 -0700, Andy Lutomirski wrote:
> On Sat, Oct 1, 2016 at 1:31 PM,=C2=A0=C2=A0<riel@redhat.com> wrote:
> >=C2=A0
> >=20
> > +static inline void switch_fpu_finish(void)
> > =C2=A0{
> > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0set_thread_flag(TIF_LOAD_FPU=
);
> > =C2=A0}
>=20
> I can imagine this causing problems with kernel code that accesses
> current's FPU state, e.g. get_xsave_field_ptr().=C2=A0

That makes me wonder, what test programs do people have
to verify the correctness of the FPU switching code?

I have a few floating point benchmarks that check
the results for correctness, but nothing that adds in
signals, for example.

What do people use?

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