This patchset provides extended peripheral support for the Amlogix GXL SoCs. In order to support more functionalities, this patchset : - Moves peripheral nodes to the common Meson arm64 dtsi - Add i2c, mmc, sd, sdio, pinctrl and clock nodes for GXL - Adds correct GXL P23X boards uart pinctrl - Add SD/MMC and SDIO WiFi support support for P23X boards This patchset depends on pinctrl patch at [1] and the dt-include file : include/dt-bindings/gpio/meson-gxl-gpio.h Changes since original RFC patchset at : [2] - Rebased on v4.10/dt64 at [3] commit b2ac270c3836 ("ARM64: dts: meson-gxbb: Add SCPI with cpufreq & sensors Nodes") [1] http://lkml.kernel.org/r/1477931531-27120-1-git-send-email-narmstrong@baylibre.com [2] http://lkml.kernel.org/r/1477060838-14164-1-git-send-email-narmstrong@baylibre.com [3] git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic.git Neil Armstrong (8): ARM64: dts: meson-gxbb: Move common nodes to meson-gx ARM64: dts: meson-gxl: Add pinctrl nodes ARM64: dts: meson-gxl: Add clock nodes ARM64: dts: meson-gxl: Add i2c nodes ARM64: dts: meson-gxl: Add MMC/SD/SDIO nodes ARM64: dts: meson-gxl-p23x: Add uart pinctrl ARM64: dts: meson-gxl-p23x: Add SD/SDIO/MMC and PWM nodes ARM64: dts: meson-gxl-p23x: Enable IR receiver arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 131 +++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 153 ++------------- .../boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi | 121 ++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 210 +++++++++++++++++++++ 4 files changed, 479 insertions(+), 136 deletions(-) -- 1.9.1
Move common nodes between GXBB and GXL in to the common GX dtsi. Leave the clock attributes in the GXBB dtsi for now. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 131 ++++++++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 153 ++++------------------------ 2 files changed, 148 insertions(+), 136 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi index fd1d0de..91be4f2 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi @@ -129,6 +129,30 @@ #clock-cells = <0>; }; + firmware { + sm: secure-monitor { + compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm"; + }; + }; + + efuse: efuse { + compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse"; + #address-cells = <1>; + #size-cells = <1>; + + sn: sn@14 { + reg = <0x14 0x10>; + }; + + eth_mac: eth_mac@34 { + reg = <0x34 0x10>; + }; + + bid: bid@46 { + reg = <0x46 0x30>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -142,6 +166,12 @@ #size-cells = <2>; ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>; + reset: reset-controller@4404 { + compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset"; + reg = <0x0 0x04404 0x0 0x20>; + #reset-cells = <1>; + }; + uart_A: serial@84c0 { compatible = "amlogic,meson-uart"; reg = <0x0 0x84c0 0x0 0x14>; @@ -149,6 +179,76 @@ clocks = <&xtal>; status = "disabled"; }; + + uart_B: serial@84dc { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x84dc 0x0 0x14>; + interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>; + status = "disabled"; + }; + + i2c_A: i2c@8500 { + compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x08500 0x0 0x20>; + interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm_ab: pwm@8550 { + compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; + reg = <0x0 0x08550 0x0 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_cd: pwm@8650 { + compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; + reg = <0x0 0x08650 0x0 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm_ef: pwm@86c0 { + compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; + reg = <0x0 0x086c0 0x0 0x10>; + #pwm-cells = <3>; + status = "disabled"; + }; + + uart_C: serial@8700 { + compatible = "amlogic,meson-uart"; + reg = <0x0 0x8700 0x0 0x14>; + interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; + clocks = <&xtal>; + status = "disabled"; + }; + + i2c_B: i2c@87c0 { + compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x087c0 0x0 0x20>; + interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c_C: i2c@87e0 { + compatible = "amlogic,meson-gxbb-i2c"; + reg = <0x0 0x087e0 0x0 0x20>; + interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + watchdog@98d0 { + compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt"; + reg = <0x0 0x098d0 0x0 0x10>; + clocks = <&xtal>; + }; }; gic: interrupt-controller@c4301000 { @@ -178,6 +278,13 @@ clocks = <&xtal>; status = "disabled"; }; + + ir: ir@580 { + compatible = "amlogic,meson-gxbb-ir"; + reg = <0x0 0x00580 0x0 0x40>; + interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; }; periphs: periphs@c8834000 { @@ -186,6 +293,11 @@ #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>; + + rng { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x0 0x0 0x4>; + }; }; @@ -195,6 +307,25 @@ #address-cells = <2>; #size-cells = <2>; ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>; + + mailbox: mailbox@404 { + compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; + reg = <0 0x404 0 0x4c>; + interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, + <0 209 IRQ_TYPE_EDGE_RISING>, + <0 210 IRQ_TYPE_EDGE_RISING>; + #mbox-cells = <1>; + }; + }; + + ethmac: ethernet@c9410000 { + compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac"; + reg = <0x0 0xc9410000 0x0 0x10000 + 0x0 0xc8834540 0x0 0x4>; + interrupts = <0 8 1>; + interrupt-names = "macirq"; + phy-mode = "rgmii"; + status = "disabled"; }; apb: apb@d0000000 { diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 2d69a3b..160664f 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -50,30 +50,6 @@ / { compatible = "amlogic,meson-gxbb"; - firmware { - sm: secure-monitor { - compatible = "amlogic,meson-gxbb-sm"; - }; - }; - - efuse: efuse { - compatible = "amlogic,meson-gxbb-efuse"; - #address-cells = <1>; - #size-cells = <1>; - - sn: sn@14 { - reg = <0x14 0x10>; - }; - - eth_mac: eth_mac@34 { - reg = <0x34 0x10>; - }; - - bid: bid@46 { - reg = <0x46 0x30>; - }; - }; - scpi { compatible = "amlogic,meson-gxbb-scpi"; mboxes = <&mailbox 1 &mailbox 2>; @@ -158,20 +134,6 @@ dr_mode = "host"; status = "disabled"; }; - - ethmac: ethernet@c9410000 { - compatible = "amlogic,meson-gxbb-dwmac", "snps,dwmac"; - reg = <0x0 0xc9410000 0x0 0x10000 - 0x0 0xc8834540 0x0 0x4>; - interrupts = <0 8 1>; - interrupt-names = "macirq"; - clocks = <&clkc CLKID_ETH>, - <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; - phy-mode = "rgmii"; - status = "disabled"; - }; }; }; @@ -192,55 +154,6 @@ }; &cbus { - reset: reset-controller@4404 { - compatible = "amlogic,meson-gxbb-reset"; - reg = <0x0 0x04404 0x0 0x20>; - #reset-cells = <1>; - }; - - uart_B: serial@84dc { - compatible = "amlogic,meson-uart"; - reg = <0x0 0x84dc 0x0 0x14>; - interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>; - status = "disabled"; - }; - - pwm_ab: pwm@8550 { - compatible = "amlogic,meson-gxbb-pwm"; - reg = <0x0 0x08550 0x0 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm_cd: pwm@8650 { - compatible = "amlogic,meson-gxbb-pwm"; - reg = <0x0 0x08650 0x0 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm_ef: pwm@86c0 { - compatible = "amlogic,meson-gxbb-pwm"; - reg = <0x0 0x086c0 0x0 0x10>; - #pwm-cells = <3>; - status = "disabled"; - }; - - uart_C: serial@8700 { - compatible = "amlogic,meson-uart"; - reg = <0x0 0x8700 0x0 0x14>; - interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>; - clocks = <&xtal>; - status = "disabled"; - }; - - watchdog@98d0 { - compatible = "amlogic,meson-gxbb-wdt"; - reg = <0x0 0x098d0 0x0 0x10>; - clocks = <&xtal>; - }; - spifc: spi@8c80 { compatible = "amlogic,meson-gxbb-spifc"; reg = <0x0 0x08c80 0x0 0x80>; @@ -249,36 +162,13 @@ clocks = <&clkc CLKID_SPI>; status = "disabled"; }; +}; - i2c_A: i2c@8500 { - compatible = "amlogic,meson-gxbb-i2c"; - reg = <0x0 0x08500 0x0 0x20>; - interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c_B: i2c@87c0 { - compatible = "amlogic,meson-gxbb-i2c"; - reg = <0x0 0x087c0 0x0 0x20>; - interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c_C: i2c@87e0 { - compatible = "amlogic,meson-gxbb-i2c"; - reg = <0x0 0x087e0 0x0 0x20>; - interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; - clocks = <&clkc CLKID_I2C>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; +ðmac { + clocks = <&clkc CLKID_ETH>, + <&clkc CLKID_FCLK_DIV2>, + <&clkc CLKID_MPLL2>; + clock-names = "stmmaceth", "clkin0", "clkin1"; }; &aobus { @@ -355,13 +245,6 @@ #reset-cells = <1>; }; - ir: ir@580 { - compatible = "amlogic,meson-gxbb-ir"; - reg = <0x0 0x00580 0x0 0x40>; - interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; - status = "disabled"; - }; - pwm_ab_AO: pwm@550 { compatible = "amlogic,meson-gxbb-pwm"; reg = <0x0 0x0550 0x0 0x10>; @@ -381,11 +264,6 @@ }; &periphs { - rng { - compatible = "amlogic,meson-rng"; - reg = <0x0 0x0 0x0 0x4>; - }; - pinctrl_periphs: pinctrl@4b0 { compatible = "amlogic,meson-gxbb-periphs-pinctrl"; #address-cells = <2>; @@ -593,15 +471,18 @@ #clock-cells = <1>; reg = <0x0 0x0 0x0 0x3db>; }; +}; - mailbox: mailbox@404 { - compatible = "amlogic,meson-gxbb-mhu"; - reg = <0 0x404 0 0x4c>; - interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, - <0 209 IRQ_TYPE_EDGE_RISING>, - <0 210 IRQ_TYPE_EDGE_RISING>; - #mbox-cells = <1>; - }; +&i2c_A { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_B { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_C { + clocks = <&clkc CLKID_I2C>; }; &sd_emmc_a { -- 1.9.1
Add pinctrl nodes and pin definitions for Amlogic Meson GXL. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 168 +++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 13b10ee..ce7f550 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -42,7 +42,175 @@ */ #include "meson-gx.dtsi" +#include <dt-bindings/gpio/meson-gxl-gpio.h> / { compatible = "amlogic,meson-gxl"; }; + +&aobus { + pinctrl_aobus: pinctrl@14 { + compatible = "amlogic,meson-gxl-aobus-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio_ao: bank@14 { + reg = <0x0 0x00014 0x0 0x8>, + <0x0 0x0002c 0x0 0x4>, + <0x0 0x00024 0x0 0x8>; + reg-names = "mux", "pull", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + uart_ao_a_pins: uart_ao_a { + mux { + groups = "uart_tx_ao_a", "uart_rx_ao_a"; + function = "uart_ao"; + }; + }; + + remote_input_ao_pins: remote_input_ao { + mux { + groups = "remote_input_ao"; + function = "remote_input_ao"; + }; + }; + }; +}; + +&periphs { + pinctrl_periphs: pinctrl@4b0 { + compatible = "amlogic,meson-gxl-periphs-pinctrl"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gpio: bank@4b0 { + reg = <0x0 0x004b0 0x0 0x28>, + <0x0 0x004e8 0x0 0x14>, + <0x0 0x00120 0x0 0x14>, + <0x0 0x00430 0x0 0x40>; + reg-names = "mux", "pull", "pull-enable", "gpio"; + gpio-controller; + #gpio-cells = <2>; + }; + + emmc_pins: emmc { + mux { + groups = "emmc_nand_d07", + "emmc_cmd", + "emmc_clk", + "emmc_ds"; + function = "emmc"; + }; + }; + + sdcard_pins: sdcard { + mux { + groups = "sdcard_d0", + "sdcard_d1", + "sdcard_d2", + "sdcard_d3", + "sdcard_cmd", + "sdcard_clk"; + function = "sdcard"; + }; + }; + + sdio_pins: sdio { + mux { + groups = "sdio_d0", + "sdio_d1", + "sdio_d2", + "sdio_d3", + "sdio_cmd", + "sdio_clk"; + function = "sdio"; + }; + }; + + sdio_irq_pins: sdio_irq { + mux { + groups = "sdio_irq"; + function = "sdio"; + }; + }; + + uart_a_pins: uart_a { + mux { + groups = "uart_tx_a", + "uart_rx_a"; + function = "uart_a"; + }; + }; + + uart_b_pins: uart_b { + mux { + groups = "uart_tx_b", + "uart_rx_b"; + function = "uart_b"; + }; + }; + + uart_c_pins: uart_c { + mux { + groups = "uart_tx_c", + "uart_rx_c"; + function = "uart_c"; + }; + }; + + i2c_a_pins: i2c_a { + mux { + groups = "i2c_sck_a", + "i2c_sda_a"; + function = "i2c_a"; + }; + }; + + i2c_b_pins: i2c_b { + mux { + groups = "i2c_sck_b", + "i2c_sda_b"; + function = "i2c_b"; + }; + }; + + i2c_c_pins: i2c_c { + mux { + groups = "i2c_sck_c", + "i2c_sda_c"; + function = "i2c_c"; + }; + }; + + eth_pins: eth_c { + mux { + groups = "eth_mdio", + "eth_mdc", + "eth_clk_rx_clk", + "eth_rx_dv", + "eth_rxd0", + "eth_rxd1", + "eth_rxd2", + "eth_rxd3", + "eth_rgmii_tx_clk", + "eth_tx_en", + "eth_txd0", + "eth_txd1", + "eth_txd2", + "eth_txd3"; + function = "eth"; + }; + }; + + pwm_e_pins: pwm_e { + mux { + groups = "pwm_e"; + function = "pwm_e"; + }; + }; + }; +}; -- 1.9.1
Add clock node for Amlogic Meson GXL. The GXBB compatible is retained since the GXBB clock tree is used for now. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index ce7f550..33d0506 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -42,6 +42,7 @@ */ #include "meson-gx.dtsi" +#include <dt-bindings/clock/gxbb-clkc.h> #include <dt-bindings/gpio/meson-gxl-gpio.h> / { @@ -214,3 +215,11 @@ }; }; }; + +&hiubus { + clkc: clock-controller@0 { + compatible = "amlogic,gxl-clkc", "amlogic,gxbb-clkc"; + #clock-cells = <1>; + reg = <0x0 0x0 0x0 0x3db>; + }; +}; -- 1.9.1
Add i2c nodes clock attributes for Amlogic Meson GXL. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 33d0506..b45df2a 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -223,3 +223,15 @@ reg = <0x0 0x0 0x0 0x3db>; }; }; + +&i2c_A { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_B { + clocks = <&clkc CLKID_I2C>; +}; + +&i2c_C { + clocks = <&clkc CLKID_I2C>; +}; -- 1.9.1
Add MMC/SD/SDIO nodes clock attributes for Amlogic Meson GXL. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index b45df2a..d1bf381 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -235,3 +235,24 @@ &i2c_C { clocks = <&clkc CLKID_I2C>; }; + +&sd_emmc_a { + clocks = <&clkc CLKID_SD_EMMC_A>, + <&xtal>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; +}; + +&sd_emmc_b { + clocks = <&clkc CLKID_SD_EMMC_B>, + <&xtal>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; +}; + +&sd_emmc_c { + clocks = <&clkc CLKID_SD_EMMC_C>, + <&xtal>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "core", "clkin0", "clkin1"; +}; -- 1.9.1
Add pinctrl attribute to p23x uart node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi index bf08e87..666fe2b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi @@ -58,6 +58,9 @@ }; }; +/* This UART is brought out to the DB9 connector */ &uart_AO { status = "okay"; + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; }; -- 1.9.1
Add SD/SDIO/MMC nodes and PWM 32768Hz clock configuration to provide storage and WiFi functionality on the p23x boards. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- .../boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi | 112 +++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi index 666fe2b..7830809 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi @@ -56,6 +56,46 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; + + vddio_boot: regulator-vddio_boot { + compatible = "regulator-fixed"; + regulator-name = "VDDIO_BOOT"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + vddao_3v3: regulator-vddao_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_3v3: regulator-vcc_3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + emmc_pwrseq: emmc-pwrseq { + compatible = "mmc-pwrseq-emmc"; + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; + }; + + wifi32k: wifi32k { + compatible = "pwm-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; + clocks = <&wifi32k>; + clock-names = "ext_clock"; + }; }; /* This UART is brought out to the DB9 connector */ @@ -64,3 +104,75 @@ pinctrl-0 = <&uart_ao_a_pins>; pinctrl-names = "default"; }; + +/* Wireless SDIO Module */ +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_pins>; + pinctrl-names = "default"; + #address-cells = <1>; + #size-cells = <0>; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + + non-removable; + disable-wp; + + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; + + brcmf: bcrmf@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + }; +}; + +/* SD card */ +&sd_emmc_b { + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-names = "default"; + + bus-width = <4>; + cap-sd-highspeed; + max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; + cd-inverted; + + vmmc-supply = <&vddao_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +/* eMMC */ +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>; + pinctrl-names = "default"; + + bus-width = <8>; + cap-sd-highspeed; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + + mmc-pwrseq = <&emmc_pwrseq>; + vmmc-supply = <&vcc_3v3>; + vqmmc-supply = <&vddio_boot>; +}; + +&pwm_ef { + status = "okay"; + pinctrl-0 = <&pwm_e_pins>; + pinctrl-names = "default"; + clocks = <&clkc CLKID_FCLK_DIV4>; + clock-names = "clkin0"; +}; -- 1.9.1
Enable the Infraread Receiver on the p23x board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi index 7830809..bbe46a2 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi @@ -105,6 +105,12 @@ pinctrl-names = "default"; }; +&ir { + status = "okay"; + pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + /* Wireless SDIO Module */ &sd_emmc_a { status = "okay"; -- 1.9.1
Neil Armstrong <narmstrong@baylibre.com> writes: > Add SD/SDIO/MMC nodes and PWM 32768Hz clock configuration to provide > storage and WiFi functionality on the p23x boards. Just curious... what storage functionality are you referring to here? Kevin > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > .../boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi | 112 +++++++++++++++++++++ > 1 file changed, 112 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi > index 666fe2b..7830809 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p23x.dtsi > @@ -56,6 +56,46 @@ > device_type = "memory"; > reg = <0x0 0x0 0x0 0x80000000>; > }; > + > + vddio_boot: regulator-vddio_boot { > + compatible = "regulator-fixed"; > + regulator-name = "VDDIO_BOOT"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + }; > + > + vddao_3v3: regulator-vddao_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VDDAO_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + vcc_3v3: regulator-vcc_3v3 { > + compatible = "regulator-fixed"; > + regulator-name = "VCC_3V3"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + }; > + > + emmc_pwrseq: emmc-pwrseq { > + compatible = "mmc-pwrseq-emmc"; > + reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>; > + }; > + > + wifi32k: wifi32k { > + compatible = "pwm-clock"; > + #clock-cells = <0>; > + clock-frequency = <32768>; > + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ > + }; > + > + sdio_pwrseq: sdio-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; > + clocks = <&wifi32k>; > + clock-names = "ext_clock"; > + }; > }; > > /* This UART is brought out to the DB9 connector */ > @@ -64,3 +104,75 @@ > pinctrl-0 = <&uart_ao_a_pins>; > pinctrl-names = "default"; > }; > + > +/* Wireless SDIO Module */ > +&sd_emmc_a { > + status = "okay"; > + pinctrl-0 = <&sdio_pins>; > + pinctrl-names = "default"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + bus-width = <4>; > + cap-sd-highspeed; > + max-frequency = <100000000>; > + > + non-removable; > + disable-wp; > + > + mmc-pwrseq = <&sdio_pwrseq>; > + > + vmmc-supply = <&vddao_3v3>; > + vqmmc-supply = <&vddio_boot>; > + > + brcmf: bcrmf@1 { > + reg = <1>; > + compatible = "brcm,bcm4329-fmac"; > + }; > +}; > + > +/* SD card */ > +&sd_emmc_b { > + status = "okay"; > + pinctrl-0 = <&sdcard_pins>; > + pinctrl-names = "default"; > + > + bus-width = <4>; > + cap-sd-highspeed; > + max-frequency = <100000000>; > + disable-wp; > + > + cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>; > + cd-inverted; > + > + vmmc-supply = <&vddao_3v3>; > + vqmmc-supply = <&vddio_boot>; > +}; > + > +/* eMMC */ > +&sd_emmc_c { > + status = "okay"; > + pinctrl-0 = <&emmc_pins>; > + pinctrl-names = "default"; > + > + bus-width = <8>; > + cap-sd-highspeed; > + cap-mmc-highspeed; > + max-frequency = <200000000>; > + non-removable; > + disable-wp; > + mmc-ddr-1_8v; > + mmc-hs200-1_8v; > + > + mmc-pwrseq = <&emmc_pwrseq>; > + vmmc-supply = <&vcc_3v3>; > + vqmmc-supply = <&vddio_boot>; > +}; > + > +&pwm_ef { > + status = "okay"; > + pinctrl-0 = <&pwm_e_pins>; > + pinctrl-names = "default"; > + clocks = <&clkc CLKID_FCLK_DIV4>; > + clock-names = "clkin0"; > +};
Neil Armstrong <narmstrong@baylibre.com> writes: > Add pinctrl nodes and pin definitions for Amlogic Meson GXL. > > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > --- > arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 168 +++++++++++++++++++++++++++++ > 1 file changed, 168 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi > index 13b10ee..ce7f550 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi > @@ -42,7 +42,175 @@ > */ > > #include "meson-gx.dtsi" > +#include <dt-bindings/gpio/meson-gxl-gpio.h> Oops, this has a dependency on the patch going through the pinctrl tree, which causes probelems we like to avoid in the arm-soc tree. For now, I've changed this to use the GXBB include since the values used are the same, but we can fix this for good in v4.10-rc, after the GXL pinctrl changes are merged. Kevin [1] [PATCH] pinctrl: meson: Add GXL pinctrl definitions > / { > compatible = "amlogic,meson-gxl"; > }; > + > +&aobus { > + pinctrl_aobus: pinctrl@14 { > + compatible = "amlogic,meson-gxl-aobus-pinctrl"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + gpio_ao: bank@14 { > + reg = <0x0 0x00014 0x0 0x8>, > + <0x0 0x0002c 0x0 0x4>, > + <0x0 0x00024 0x0 0x8>; > + reg-names = "mux", "pull", "gpio"; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + uart_ao_a_pins: uart_ao_a { > + mux { > + groups = "uart_tx_ao_a", "uart_rx_ao_a"; > + function = "uart_ao"; > + }; > + }; > + > + remote_input_ao_pins: remote_input_ao { > + mux { > + groups = "remote_input_ao"; > + function = "remote_input_ao"; > + }; > + }; > + }; > +}; > + > +&periphs { > + pinctrl_periphs: pinctrl@4b0 { > + compatible = "amlogic,meson-gxl-periphs-pinctrl"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + gpio: bank@4b0 { > + reg = <0x0 0x004b0 0x0 0x28>, > + <0x0 0x004e8 0x0 0x14>, > + <0x0 0x00120 0x0 0x14>, > + <0x0 0x00430 0x0 0x40>; > + reg-names = "mux", "pull", "pull-enable", "gpio"; > + gpio-controller; > + #gpio-cells = <2>; > + }; > + > + emmc_pins: emmc { > + mux { > + groups = "emmc_nand_d07", > + "emmc_cmd", > + "emmc_clk", > + "emmc_ds"; > + function = "emmc"; > + }; > + }; > + > + sdcard_pins: sdcard { > + mux { > + groups = "sdcard_d0", > + "sdcard_d1", > + "sdcard_d2", > + "sdcard_d3", > + "sdcard_cmd", > + "sdcard_clk"; > + function = "sdcard"; > + }; > + }; > + > + sdio_pins: sdio { > + mux { > + groups = "sdio_d0", > + "sdio_d1", > + "sdio_d2", > + "sdio_d3", > + "sdio_cmd", > + "sdio_clk"; > + function = "sdio"; > + }; > + }; > + > + sdio_irq_pins: sdio_irq { > + mux { > + groups = "sdio_irq"; > + function = "sdio"; > + }; > + }; > + > + uart_a_pins: uart_a { > + mux { > + groups = "uart_tx_a", > + "uart_rx_a"; > + function = "uart_a"; > + }; > + }; > + > + uart_b_pins: uart_b { > + mux { > + groups = "uart_tx_b", > + "uart_rx_b"; > + function = "uart_b"; > + }; > + }; > + > + uart_c_pins: uart_c { > + mux { > + groups = "uart_tx_c", > + "uart_rx_c"; > + function = "uart_c"; > + }; > + }; > + > + i2c_a_pins: i2c_a { > + mux { > + groups = "i2c_sck_a", > + "i2c_sda_a"; > + function = "i2c_a"; > + }; > + }; > + > + i2c_b_pins: i2c_b { > + mux { > + groups = "i2c_sck_b", > + "i2c_sda_b"; > + function = "i2c_b"; > + }; > + }; > + > + i2c_c_pins: i2c_c { > + mux { > + groups = "i2c_sck_c", > + "i2c_sda_c"; > + function = "i2c_c"; > + }; > + }; > + > + eth_pins: eth_c { > + mux { > + groups = "eth_mdio", > + "eth_mdc", > + "eth_clk_rx_clk", > + "eth_rx_dv", > + "eth_rxd0", > + "eth_rxd1", > + "eth_rxd2", > + "eth_rxd3", > + "eth_rgmii_tx_clk", > + "eth_tx_en", > + "eth_txd0", > + "eth_txd1", > + "eth_txd2", > + "eth_txd3"; > + function = "eth"; > + }; > + }; > + > + pwm_e_pins: pwm_e { > + mux { > + groups = "pwm_e"; > + function = "pwm_e"; > + }; > + }; > + }; > +};