* [PATCH] tile: handle RO_AFTER_INIT_DATA
@ 2016-11-07 19:50 Chris Metcalf
2016-11-08 7:15 ` Heiko Carstens
0 siblings, 1 reply; 5+ messages in thread
From: Chris Metcalf @ 2016-11-07 19:50 UTC (permalink / raw)
To: linux-kernel, Kees Cook, Heiko Carstens, Martin Schwidefsky; +Cc: Chris Metcalf
This is the minimal change to handle RO_AFTER_INIT_DATA.
The tile architecture already marks RO_DATA as read-only in
the kernel, so grouping RO_AFTER_INIT_DATA with RO_DATA, as is
done by default, means the kernel faults in init when it tries
to write to RO_AFTER_INIT_DATA. For now, just move it past the
end of the RODATA section so it is not specially treated.
---
This is just to fix 4.9; I will post a more complete fix shortly
targeting 4.10.
arch/tile/kernel/vmlinux.lds.S | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/tile/kernel/vmlinux.lds.S b/arch/tile/kernel/vmlinux.lds.S
index e1baf094fba4..dcd7445c31a2 100644
--- a/arch/tile/kernel/vmlinux.lds.S
+++ b/arch/tile/kernel/vmlinux.lds.S
@@ -1,3 +1,6 @@
+/* Handle ro_after_init data on our own. */
+#define RO_AFTER_INIT_DATA
+
#include <asm-generic/vmlinux.lds.h>
#include <asm/page.h>
#include <asm/cache.h>
@@ -87,6 +90,7 @@ SECTIONS
_sdata = .; /* Start of data section */
RO_DATA_SECTION(PAGE_SIZE)
+ RO_AFTER_INIT_DATA
RW_DATA_SECTION(L2_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
_edata = .;
--
2.7.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] tile: handle RO_AFTER_INIT_DATA
2016-11-07 19:50 [PATCH] tile: handle RO_AFTER_INIT_DATA Chris Metcalf
@ 2016-11-08 7:15 ` Heiko Carstens
2016-11-14 20:29 ` [PATCH v2] tile: handle __ro_after_init like parisc does Chris Metcalf
0 siblings, 1 reply; 5+ messages in thread
From: Heiko Carstens @ 2016-11-08 7:15 UTC (permalink / raw)
To: Chris Metcalf; +Cc: linux-kernel, Kees Cook, Martin Schwidefsky
On Mon, Nov 07, 2016 at 02:50:27PM -0500, Chris Metcalf wrote:
> This is the minimal change to handle RO_AFTER_INIT_DATA.
> The tile architecture already marks RO_DATA as read-only in
> the kernel, so grouping RO_AFTER_INIT_DATA with RO_DATA, as is
> done by default, means the kernel faults in init when it tries
> to write to RO_AFTER_INIT_DATA. For now, just move it past the
> end of the RODATA section so it is not specially treated.
> ---
> This is just to fix 4.9; I will post a more complete fix shortly
> targeting 4.10.
>
> arch/tile/kernel/vmlinux.lds.S | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/tile/kernel/vmlinux.lds.S b/arch/tile/kernel/vmlinux.lds.S
> index e1baf094fba4..dcd7445c31a2 100644
> --- a/arch/tile/kernel/vmlinux.lds.S
> +++ b/arch/tile/kernel/vmlinux.lds.S
> @@ -1,3 +1,6 @@
> +/* Handle ro_after_init data on our own. */
> +#define RO_AFTER_INIT_DATA
> +
> #include <asm-generic/vmlinux.lds.h>
> #include <asm/page.h>
> #include <asm/cache.h>
> @@ -87,6 +90,7 @@ SECTIONS
>
> _sdata = .; /* Start of data section */
> RO_DATA_SECTION(PAGE_SIZE)
> + RO_AFTER_INIT_DATA
> RW_DATA_SECTION(L2_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
> _edata = .;
imho, the minimal fix would be to just
#define __ro_after_init __read_mostly
within arch/tile/include/asm/cache.h. That's also what parisc currently
has.
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2] tile: handle __ro_after_init like parisc does
2016-11-08 7:15 ` Heiko Carstens
@ 2016-11-14 20:29 ` Chris Metcalf
2016-11-14 21:12 ` Kees Cook
0 siblings, 1 reply; 5+ messages in thread
From: Chris Metcalf @ 2016-11-14 20:29 UTC (permalink / raw)
To: Heiko Carstens, Kees Cook, Martin Schwidefsky, linux-kernel; +Cc: Chris Metcalf
The tile architecture already marks RO_DATA as read-only in
the kernel, so grouping RO_AFTER_INIT_DATA with RO_DATA, as is
done by default, means the kernel faults in init when it tries
to write to RO_AFTER_INIT_DATA. For now, just arrange that
__ro_after_init is handled like __write_once, i.e. __read_mostly.
Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com>
---
arch/tile/include/asm/cache.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
index 6160761d5f61..4810e48dbbbf 100644
--- a/arch/tile/include/asm/cache.h
+++ b/arch/tile/include/asm/cache.h
@@ -61,4 +61,7 @@
*/
#define __write_once __read_mostly
+/* __ro_after_init is the generic name for the tile arch __write_once. */
+#define __ro_after_init __read_mostly
+
#endif /* _ASM_TILE_CACHE_H */
--
2.7.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v2] tile: handle __ro_after_init like parisc does
2016-11-14 20:29 ` [PATCH v2] tile: handle __ro_after_init like parisc does Chris Metcalf
@ 2016-11-14 21:12 ` Kees Cook
2016-11-15 7:41 ` Heiko Carstens
0 siblings, 1 reply; 5+ messages in thread
From: Kees Cook @ 2016-11-14 21:12 UTC (permalink / raw)
To: Chris Metcalf; +Cc: Heiko Carstens, Martin Schwidefsky, LKML
On Mon, Nov 14, 2016 at 12:29 PM, Chris Metcalf <cmetcalf@mellanox.com> wrote:
> The tile architecture already marks RO_DATA as read-only in
> the kernel, so grouping RO_AFTER_INIT_DATA with RO_DATA, as is
> done by default, means the kernel faults in init when it tries
> to write to RO_AFTER_INIT_DATA. For now, just arrange that
> __ro_after_init is handled like __write_once, i.e. __read_mostly.
>
> Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com>
Reviewed-by: Kees Cook <keescook@chromium.org>
At some point here, I want to collect all the arch maintainers and
discuss the options for correctly reflecting the three data
memory-protection needs we have:
- always read-only
- read-only after init
- read-only except during rare updates
(The latter one doesn't exist all yet...)
x86, arm, and arm64 use mark_rodata_ro() after init finishes, so they
don't technically implement "always read-only". parisc, tile, powerpc,
others have "always read-only", but disable read-only-after-init since
they don't use mark_rodata_ro(). I think s390 has recently implemented
both, but I have to double-check...
-Kees
> ---
> arch/tile/include/asm/cache.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/tile/include/asm/cache.h b/arch/tile/include/asm/cache.h
> index 6160761d5f61..4810e48dbbbf 100644
> --- a/arch/tile/include/asm/cache.h
> +++ b/arch/tile/include/asm/cache.h
> @@ -61,4 +61,7 @@
> */
> #define __write_once __read_mostly
>
> +/* __ro_after_init is the generic name for the tile arch __write_once. */
> +#define __ro_after_init __read_mostly
> +
> #endif /* _ASM_TILE_CACHE_H */
> --
> 2.7.2
>
--
Kees Cook
Nexus Security
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v2] tile: handle __ro_after_init like parisc does
2016-11-14 21:12 ` Kees Cook
@ 2016-11-15 7:41 ` Heiko Carstens
0 siblings, 0 replies; 5+ messages in thread
From: Heiko Carstens @ 2016-11-15 7:41 UTC (permalink / raw)
To: Kees Cook; +Cc: Chris Metcalf, Martin Schwidefsky, LKML
On Mon, Nov 14, 2016 at 01:12:05PM -0800, Kees Cook wrote:
> At some point here, I want to collect all the arch maintainers and
> discuss the options for correctly reflecting the three data
> memory-protection needs we have:
>
> - always read-only
> - read-only after init
> - read-only except during rare updates
>
> (The latter one doesn't exist all yet...)
>
> x86, arm, and arm64 use mark_rodata_ro() after init finishes, so they
> don't technically implement "always read-only". parisc, tile, powerpc,
> others have "always read-only", but disable read-only-after-init since
> they don't use mark_rodata_ro(). I think s390 has recently implemented
> both, but I have to double-check...
Yes, s390 has both: an early always read-only support, which is effective
as soon as paging_init() has set up and enabled page tables.
Our mark_rodata_ro() implementation only makes the ro_after_init section
read-only.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2016-11-15 7:42 UTC | newest]
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2016-11-07 19:50 [PATCH] tile: handle RO_AFTER_INIT_DATA Chris Metcalf
2016-11-08 7:15 ` Heiko Carstens
2016-11-14 20:29 ` [PATCH v2] tile: handle __ro_after_init like parisc does Chris Metcalf
2016-11-14 21:12 ` Kees Cook
2016-11-15 7:41 ` Heiko Carstens
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