From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937085AbcKOOFI (ORCPT ); Tue, 15 Nov 2016 09:05:08 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:53716 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934591AbcKOOFD (ORCPT ); Tue, 15 Nov 2016 09:05:03 -0500 DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 45760615E9 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=vivek.gautam@codeaurora.org From: Vivek Gautam To: srinivas.kandagatla@linaro.org, maxime.ripard@free-electrons.com Cc: gregkh@linuxfoundation.org, sboyd@codeaurora.org, rnayak@codeaurora.org, linux-kernel@vger.kernel.org, Vivek Gautam Subject: [PATCH] nvmem: qfprom: Fix to support single byte read/write Date: Tue, 15 Nov 2016 19:34:42 +0530 Message-Id: <1479218682-15948-1-git-send-email-vivek.gautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The nvmem core driver supports to read and write single byte. This helps in extracting a required value based on bit-offset and number of bits for the required value in the nvmem cell. Signed-off-by: Vivek Gautam --- Based on torvalds's master branch. - Tested on db410c for thermal sensors, and on db820c for qusb2 phy with tree [1] based on linaro qcom landing team's integration tree. [1] https://github.com/vivekgautam1/linux/tree/linaro/integration-linux-qcomlt-qcom-phy-upstream drivers/nvmem/qfprom.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/nvmem/qfprom.c b/drivers/nvmem/qfprom.c index b5305f0..2bdb6c3 100644 --- a/drivers/nvmem/qfprom.c +++ b/drivers/nvmem/qfprom.c @@ -21,11 +21,11 @@ static int qfprom_reg_read(void *context, unsigned int reg, void *_val, size_t bytes) { void __iomem *base = context; - u32 *val = _val; - int i = 0, words = bytes / 4; + u8 *val = _val; + int i = 0, words = bytes; while (words--) - *val++ = readl(base + reg + (i++ * 4)); + *val++ = readb(base + reg + i++); return 0; } @@ -34,11 +34,11 @@ static int qfprom_reg_write(void *context, unsigned int reg, void *_val, size_t bytes) { void __iomem *base = context; - u32 *val = _val; - int i = 0, words = bytes / 4; + u8 *val = _val; + int i = 0, words = bytes; while (words--) - writel(*val++, base + reg + (i++ * 4)); + writeb(*val++, base + reg + i++); return 0; } @@ -53,7 +53,7 @@ static int qfprom_remove(struct platform_device *pdev) static struct nvmem_config econfig = { .name = "qfprom", .owner = THIS_MODULE, - .stride = 4, + .stride = 1, .word_size = 1, .reg_read = qfprom_reg_read, .reg_write = qfprom_reg_write, -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project