From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754740AbcKVAPx (ORCPT ); Mon, 21 Nov 2016 19:15:53 -0500 Received: from mout.perfora.net ([74.208.4.194]:63103 "EHLO mout.perfora.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753962AbcKVAPP (ORCPT ); Mon, 21 Nov 2016 19:15:15 -0500 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: Marcel Ziswiler , Thierry Reding , linux-kernel@vger.kernel.org, Stephen Warren , Rob Herring , linux-tegra@vger.kernel.org, Mark Rutland , Alexandre Courbot , Russell King , linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/6] apalis-tk1: adjust pin muxing for v1.1 hw Date: Tue, 22 Nov 2016 01:14:05 +0100 Message-Id: <1479773647-14726-5-git-send-email-marcel.ziswiler@toradex.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1479773647-14726-1-git-send-email-marcel.ziswiler@toradex.com> References: <1479773647-14726-1-git-send-email-marcel.ziswiler@toradex.com> X-Provags-ID: V03:K0:qPu1qSairXG1ikOsYvonVUsU0LndL9wV4FQRwejFqwRxmmbgJEw 1Fggh4FeQNpQ8HeTv7lw80DlAPDtyEeiY7hHXbgkJAG4vCyTQH0nxCOUYPHwlvv6JBiesxz QPXYj8ZeeiqwTYu12DWIBwEDeooJIPHh4T064mO7cKS2AF+HrWcKHEU92bnbxWm4F+EChdZ AJHeTiQHccoEonog+MHGQ== X-UI-Out-Filterresults: notjunk:1;V01:K0:uzsx/fBE6wY=:PUnaaBPMLakygXaeZkuAze JlWc1DmHi1gcjHQjuSUQwCEta3+rVxVTphP4uWKwKi244+8UYrRezZEzzSz22TahHcoVIUmpx VqfZsKgEsFqrHBfO82Csvyq0R/hJ2Hqd37nL0btHcg4iuwHRPOjLADhuWFuVnK6FCjjm/A0/I D9TAR9LlzbYoNzEuZekvWjFqmObsU0vlTNA5acvqIEpFXBBSw6pOym+kr5oxhECOM8KLdaNrU WgOEZOUyxrinJdPPCWsN8D/I4Juuh5itiMKWNvKxmXGU+s/R+NChL/4t0LfCEiQ0+A3PiLzPD D7UH1tM01VpTa+LDpwDMCKbKsIRFoBiynvr/EqYdbQ5xLiTIIIyzNwZx8fa/fUJ+LFlp5kIWc e8xCzQAZwuBA628LgAzy6RiFcSOtDxKi07Rb7JFyM8ndUZH/TdmhVJB/NuqW0eE4NWnwA43XA gybBZeklZvE/CJU5xC9/Rp1JrHFrhNpnHwdak6tDuivz1gg7E1PJQhwbvbEniMVwZVF0DcNWD uWfSe7KmxFKMZbdnwRH43XTmFjwCDb67Y1D8z77wUaEdSsvNWn+MLbwRDmnzdXHLmzo4oJ2oR xvCkYUqIQX2IdmQO3/nUcC8zQ5tyU4vR+He/T2PgTcgGg+kQdjWlWgBJGikveiXKiQeSoOTXs Md9xLwV5lkSb3HqyPNn660tfNxvebk1BAW502IrHq4B1OZ4A7ZuMgmKki9dbh7ke7vxI= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Configure Apalis MMC1 D6 GPIO on SDMMC3_CLK_LB_IN as reserved function without any pull-up/down. Configure GPIO_PV2 as SD1_CD# according to latest V1.1 HW. Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output driver enabled aka not tristated and input driver enabled as well as it features some magic properties even though the external loopback is disabled and the internal loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 bits being set to 0xfffd according to the TRM! This pin is now a not-connect on V1.1 HW in order to avoid any interference. Signed-off-by: Marcel Ziswiler --- arch/arm/boot/dts/tegra124-apalis.dtsi | 53 +++++++++++++++------------------- 1 file changed, 23 insertions(+), 30 deletions(-) diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi b/arch/arm/boot/dts/tegra124-apalis.dtsi index 747ce81..2bfc579 100644 --- a/arch/arm/boot/dts/tegra124-apalis.dtsi +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi @@ -414,18 +414,10 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use MMC1_D6 aka SDMMC3_CLK_LB_IN for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */ nvidia,pins = "sdmmc3_clk_lb_in_pee5"; - nvidia,function = "sdmmc3"; - nvidia,pull = ; + nvidia,function = "rsvd2"; + nvidia,pull = ; nvidia,tristate = ; nvidia,enable-input = ; }; @@ -520,20 +512,12 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - /* - * Don't use SD1_CD# aka SDMMC3_CLK_LB_OUT for now as it - * features some magic properties even though the - * external loopback is disabled and the internal - * loopback used as per SDMMC_VENDOR_MISC_CNTRL_0 - * register's SDMMC_SPARE1 bits being set to 0xfffd - * according to the TRM! - */ - sdmmc3_clk_lb_out_pee4 { /* CD# GPIO */ - nvidia,pins = "sdmmc3_clk_lb_out_pee4"; - nvidia,function = "rsvd2"; - nvidia,pull = ; + sdmmc3_cd_n_pv2 { /* CD# GPIO */ + nvidia,pins = "sdmmc3_cd_n_pv2"; + nvidia,function = "rsvd3"; + nvidia,pull = ; nvidia,tristate = ; - nvidia,enable-input = ; + nvidia,enable-input = ; }; /* Apalis SPDIF */ @@ -1512,13 +1496,6 @@ nvidia,tristate = ; nvidia,enable-input = ; }; - sdmmc3_cd_n_pv2 { /* NC */ - nvidia,pins = "sdmmc3_cd_n_pv2"; - nvidia,function = "rsvd3"; - nvidia,pull = ; - nvidia,tristate = ; - nvidia,enable-input = ; - }; gpio_x1_aud_px1 { /* NC */ nvidia,pins = "gpio_x1_aud_px1"; nvidia,function = "rsvd2"; @@ -1568,6 +1545,22 @@ nvidia,tristate = ; nvidia,enable-input = ; }; + /* + * Leave SDMMC3_CLK_LB_OUT muxed as SDMMC3 with output + * driver enabled aka not tristated and input driver + * enabled as well as it features some magic properties + * even though the external loopback is disabled and the + * internal loopback used as per + * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1 + * bits being set to 0xfffd according to the TRM! + */ + sdmmc3_clk_lb_out_pee4 { /* NC */ + nvidia,pins = "sdmmc3_clk_lb_out_pee4"; + nvidia,function = "sdmmc3"; + nvidia,pull = ; + nvidia,tristate = ; + nvidia,enable-input = ; + }; }; }; -- 2.5.5