From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754718AbcL0MDO (ORCPT ); Tue, 27 Dec 2016 07:03:14 -0500 Received: from mga06.intel.com ([134.134.136.31]:48475 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754279AbcL0MDH (ORCPT ); Tue, 27 Dec 2016 07:03:07 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,416,1477983600"; d="scan'208";a="1104658645" From: "Kweh, Hock Leong" To: "David S. Miller" , Joao Pinto , Giuseppe CAVALLARO , seraphin.bonnaffe@st.com, f.fainelli@gmail.com Cc: Alexandre TORGUE , Joachim Eastwood , Niklas Cassel , Johan Hovold , pavel@ucw.cz, Ong Boon Leong , "Kweh, Hock Leong" , weifeng.voon@intel.com, lars.persson@axis.com, netdev , LKML Subject: [PATCH] net: stmmac: fix incorrect bit set in gmac4 mdio addr register Date: Wed, 28 Dec 2016 04:07:41 +0800 Message-Id: <1482869261-23803-1-git-send-email-hock.leong.kweh@intel.com> X-Mailer: git-send-email 1.7.9.5 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "Kweh, Hock Leong" Fixing the gmac4 mdio write access to use MII_GMAC4_WRITE only instead of OR together with MII_WRITE. Signed-off-by: Kweh, Hock Leong --- drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c index fda01f7..b0344c2 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c @@ -116,7 +116,7 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, unsigned int mii_address = priv->hw->mii.addr; unsigned int mii_data = priv->hw->mii.data; - u32 value = MII_WRITE | MII_BUSY; + u32 value = MII_BUSY; value |= (phyaddr << priv->hw->mii.addr_shift) & priv->hw->mii.addr_mask; @@ -126,6 +126,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg, & priv->hw->mii.clk_csr_mask; if (priv->plat->has_gmac4) value |= MII_GMAC4_WRITE; + else + value |= MII_WRITE; /* Wait until any existing MII operation is complete */ if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address)) -- 1.7.9.5