From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030404AbdADNjw (ORCPT ); Wed, 4 Jan 2017 08:39:52 -0500 Received: from mail-wj0-f176.google.com ([209.85.210.176]:35323 "EHLO mail-wj0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S936278AbdADNfN (ORCPT ); Wed, 4 Jan 2017 08:35:13 -0500 From: Srinivas Kandagatla To: Andy Gross Cc: David Brown , Rob Herring , Mark Rutland , linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, "Ivan T. Ivanov" Subject: [PATCH 4/6] arm64: dts: apq8016-sbc: Limit MPP4 high state to 1.8V Date: Wed, 4 Jan 2017 13:35:00 +0000 Message-Id: <1483536902-21450-5-git-send-email-srinivas.kandagatla@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1483536902-21450-1-git-send-email-srinivas.kandagatla@linaro.org> References: <1483536902-21450-1-git-send-email-srinivas.kandagatla@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: "Ivan T. Ivanov" 96Boards specs require all GPIO signals to be at 1.8V. Limit MPP4, which is PIN28 on J8, to 1.8V(L5). Signed-off-by: Ivan T. Ivanov --- arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi index f881437..d946408 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc-pmic-pins.dtsi @@ -1,4 +1,5 @@ #include +#include &pm8916_gpios { @@ -30,6 +31,18 @@ &pm8916_mpps { + pinctrl-names = "default"; + pinctrl-0 = <&ls_exp_gpio_f>; + + ls_exp_gpio_f: pm8916_mpp4 { + pinconf { + pins = "mpp4"; + function = "digital"; + output-low; + power-source = ; // 1.8V + }; + }; + pm8916_mpps_leds: pm8916_mpps_leds { pinconf { pins = "mpp2", "mpp3"; -- 2.10.1