From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S969783AbdADXhe (ORCPT ); Wed, 4 Jan 2017 18:37:34 -0500 Received: from mail-out.m-online.net ([212.18.0.10]:45287 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761857AbdADXh3 (ORCPT ); Wed, 4 Jan 2017 18:37:29 -0500 X-Auth-Info: +yW6bs8JRUfxI6+bBpZ83+f3B9tDI3CDSgPwc29hjtM= From: Lukasz Majewski To: Thierry Reding , Sascha Hauer , Stefan Agner , Boris Brezillon , linux-pwm@vger.kernel.org, Bhuvanchandra DV , linux-kernel@vger.kernel.org Cc: Lothar Wassmann , kernel@pengutronix.de, Fabio Estevam , Lukasz Majewski Subject: [PATCH v4 05/11] pwm: imx: Move PWMv2 software reset code to a separate function Date: Thu, 5 Jan 2017 00:36:48 +0100 Message-Id: <1483573014-13185-6-git-send-email-lukma@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1483573014-13185-1-git-send-email-lukma@denx.de> References: <1483573014-13185-1-git-send-email-lukma@denx.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Lukasz Majewski The software reset code has been extracted from imx_pwm_config_v2 function and moved to new one - imx_pwm_sw_reset(). This change reduces the overall size of imx_pwm_config_v2() and prepares it for atomic PWM operation. Suggested-by: Stefan Agner Suggested-by: Boris Brezillon Signed-off-by: Lukasz Majewski --- Changes for v4: - None Changes for v3: - None Changes for v2: - Add missing parenthesis --- drivers/pwm/pwm-imx.c | 31 +++++++++++++++++++++---------- 1 file changed, 21 insertions(+), 10 deletions(-) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 11e3f3e..f0d78f3 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -120,6 +120,25 @@ static void imx_pwm_disable_v1(struct pwm_chip *chip, struct pwm_device *pwm) clk_disable_unprepare(imx->clk_per); } +static void imx_pwm_sw_reset(struct pwm_chip *chip) +{ + struct imx_chip *imx = to_imx_chip(chip); + struct device *dev = chip->dev; + int wait_count = 0; + u32 cr; + + writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); + do { + usleep_range(200, 1000); + cr = readl(imx->mmio_base + MX3_PWMCR); + } while ((cr & MX3_PWMCR_SWR) && + (wait_count++ < MX3_PWM_SWR_LOOP)); + + if (cr & MX3_PWMCR_SWR) + dev_warn(dev, "software reset timeout\n"); +} + + static int imx_pwm_config_v2(struct pwm_chip *chip, struct pwm_device *pwm, int duty_ns, int period_ns) { @@ -129,7 +148,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, unsigned long period_cycles, duty_cycles, prescale; unsigned int period_ms; bool enable = pwm_is_enabled(pwm); - int wait_count = 0, fifoav; + int fifoav; u32 cr, sr; /* @@ -152,15 +171,7 @@ static int imx_pwm_config_v2(struct pwm_chip *chip, dev_warn(dev, "there is no free FIFO slot\n"); } } else { - writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); - do { - usleep_range(200, 1000); - cr = readl(imx->mmio_base + MX3_PWMCR); - } while ((cr & MX3_PWMCR_SWR) && - (wait_count++ < MX3_PWM_SWR_LOOP)); - - if (cr & MX3_PWMCR_SWR) - dev_warn(dev, "software reset timeout\n"); + imx_pwm_sw_reset(chip); } c = clk_get_rate(imx->clk_per); -- 2.1.4