From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937486AbdADXjR (ORCPT ); Wed, 4 Jan 2017 18:39:17 -0500 Received: from mail-out.m-online.net ([212.18.0.10]:35267 "EHLO mail-out.m-online.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S969795AbdADXhi (ORCPT ); Wed, 4 Jan 2017 18:37:38 -0500 X-Auth-Info: aBVeHjSgQZtWTMKG+nFF1RKYBXXlux3I9p5Nhdf7QM0= From: Lukasz Majewski To: Thierry Reding , Sascha Hauer , Stefan Agner , Boris Brezillon , linux-pwm@vger.kernel.org, Bhuvanchandra DV , linux-kernel@vger.kernel.org Cc: Lothar Wassmann , kernel@pengutronix.de, Fabio Estevam , Lukasz Majewski , Lukasz Majewski Subject: [PATCH v4 07/11] pwm: imx: Provide atomic PWM support for i.MX PWMv2 Date: Thu, 5 Jan 2017 00:36:50 +0100 Message-Id: <1483573014-13185-8-git-send-email-lukma@denx.de> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1483573014-13185-1-git-send-email-lukma@denx.de> References: <1483573014-13185-1-git-send-email-lukma@denx.de> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This commit provides apply() callback implementation for i.MX's PWMv2. Suggested-by: Stefan Agner Suggested-by: Boris Brezillon Signed-off-by: Lukasz Majewski Reviewed-by: Boris Brezillon --- Changes for v4: - Avoid recalculation of PWM parameters when disabling PWM signal - Unconditionally call clk_prepare_enable(imx->clk_per) and clk_disable_unprepare(imx->clk_per) Changes for v3: - Remove ipg clock enable/disable functions Changes for v2: - None --- drivers/pwm/pwm-imx.c | 67 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 60cdc5c..134dd66 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -249,6 +249,72 @@ static int imx_pwm_config(struct pwm_chip *chip, return ret; } +static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + unsigned long period_cycles, duty_cycles, prescale; + struct imx_chip *imx = to_imx_chip(chip); + struct pwm_state cstate; + unsigned long long c; + int ret; + + pwm_get_state(pwm, &cstate); + + if (state->enabled) { + c = clk_get_rate(imx->clk_per); + c *= state->period; + + do_div(c, 1000000000); + period_cycles = c; + + prescale = period_cycles / 0x10000 + 1; + + period_cycles /= prescale; + c = (unsigned long long)period_cycles * state->duty_cycle; + do_div(c, state->period); + duty_cycles = c; + + /* + * according to imx pwm RM, the real period value should be + * PERIOD value in PWMPR plus 2. + */ + if (period_cycles > 2) + period_cycles -= 2; + else + period_cycles = 0; + + ret = clk_prepare_enable(imx->clk_per); + if (ret) + return ret; + + /* + * Wait for a free FIFO slot if the PWM is already enabled, and + * flush the FIFO if the PWM was disabled and is about to be + * enabled. + */ + if (cstate.enabled) + imx_pwm_wait_fifo_slot(chip, pwm); + else if (state->enabled) + imx_pwm_sw_reset(chip); + + writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); + writel(period_cycles, imx->mmio_base + MX3_PWMPR); + + writel(MX3_PWMCR_PRESCALER(prescale) | + MX3_PWMCR_DOZEEN | MX3_PWMCR_WAITEN | + MX3_PWMCR_DBGEN | MX3_PWMCR_CLKSRC_IPG_HIGH | + MX3_PWMCR_EN, + imx->mmio_base + MX3_PWMCR); + + } else { + writel(0, imx->mmio_base + MX3_PWMCR); + + clk_disable_unprepare(imx->clk_per); + } + + return 0; +} + static int imx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) { struct imx_chip *imx = to_imx_chip(chip); @@ -280,6 +346,7 @@ static struct pwm_ops imx_pwm_ops_v1 = { }; static struct pwm_ops imx_pwm_ops_v2 = { + .apply = imx_pwm_apply_v2, .enable = imx_pwm_enable, .disable = imx_pwm_disable, .config = imx_pwm_config, -- 2.1.4