From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751444AbdARIWg (ORCPT ); Wed, 18 Jan 2017 03:22:36 -0500 Received: from mail-pf0-f177.google.com ([209.85.192.177]:34849 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751167AbdARIWe (ORCPT ); Wed, 18 Jan 2017 03:22:34 -0500 From: Leo Yan To: Michael Turquette , Stephen Boyd , Leo Yan , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Haojian Zhuang , Guodong Xu , John Stultz Subject: [PATCH] clk: hisilicon: fix lock assignment Date: Wed, 18 Jan 2017 16:13:38 +0800 Message-Id: <1484727218-3499-1-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org In clock driver initialize phase the spinlock is missed to assignment to struct clkgate_separated, finally there have no locking to protect exclusive accessing for clock registers. This bug introduces the console has no output after enable coresight driver on 96borads Hikey; this is because console using UART3, which has shared the same register with coresight clock enabling bit. After applied this patch it can assign lock properly to protect exclusive accessing, and console can work well after enabled coresight modules. Signed-off-by: Leo Yan --- drivers/clk/hisilicon/clkgate-separated.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/hisilicon/clkgate-separated.c b/drivers/clk/hisilicon/clkgate-separated.c index a47812f..7908bc3 100644 --- a/drivers/clk/hisilicon/clkgate-separated.c +++ b/drivers/clk/hisilicon/clkgate-separated.c @@ -120,6 +120,7 @@ struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name, sclk->bit_idx = bit_idx; sclk->flags = clk_gate_flags; sclk->hw.init = &init; + sclk->lock = lock; clk = clk_register(dev, &sclk->hw); if (IS_ERR(clk)) -- 2.7.4