From: Philipp Zabel <p.zabel@pengutronix.de>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Simon Horman <horms@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 4/8] clk: renesas: cpg-mssr: Add support for reset control
Date: Fri, 20 Jan 2017 16:57:10 +0100 [thread overview]
Message-ID: <1484927830.2897.51.camel@pengutronix.de> (raw)
In-Reply-To: <1484921306-9967-5-git-send-email-geert+renesas@glider.be>
Hi Geert,
On Fri, 2017-01-20 at 15:08 +0100, Geert Uytterhoeven wrote:
> Add optional support for the Reset Control feature of the Renesas Clock
> Pulse Generator / Module Standby and Software Reset module on R-Car
> Gen2, R-Car Gen3, and RZ/G1 SoCs.
Is there a reason to make this optional?
> This allows to reset SoC devices using the Reset Controller API.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Looks good to me,
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Just a small issue below,
> ---
> drivers/clk/renesas/renesas-cpg-mssr.c | 122 +++++++++++++++++++++++++++++++++
> 1 file changed, 122 insertions(+)
>
> diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
> index f1161a585c57e433..ea4af714ac14603a 100644
> --- a/drivers/clk/renesas/renesas-cpg-mssr.c
> +++ b/drivers/clk/renesas/renesas-cpg-mssr.c
[...]
> +static int cpg_mssr_reset(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
> + unsigned int reg = id / 32;
> + unsigned int bit = id % 32;
> + u32 bitmask = BIT(bit);
Here you have a bitmask = BIT(bit) variable.
> + unsigned long flags;
> + u32 value;
> +
> + dev_dbg(priv->dev, "reset %u%02u\n", reg, bit);
> +
> + /* Reset module */
> + spin_lock_irqsave(&priv->rmw_lock, flags);
> + value = readl(priv->base + SRCR(reg));
> + value |= bitmask;
Here you use it.
> + writel(value, priv->base + SRCR(reg));
> + spin_unlock_irqrestore(&priv->rmw_lock, flags);
> +
> + /* Wait for at least one cycle of the RCLK clock (@ ca. 32 kHz) */
> + udelay(35);
> +
> + /* Release module from reset state */
> + writel(bitmask, priv->base + SRSTCLR(reg));
> +
> + return 0;
> +}
> +
> +static int cpg_mssr_assert(struct reset_controller_dev *rcdev, unsigned long id)
> +{
> + struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
> + unsigned int reg = id / 32;
> + unsigned int bit = id % 32;
Here you haven't.
> + unsigned long flags;
> + u32 value;
> +
> + dev_dbg(priv->dev, "assert %u%02u\n", reg, bit);
> +
> + spin_lock_irqsave(&priv->rmw_lock, flags);
> + value = readl(priv->base + SRCR(reg));
> + writel(value | BIT(bit), priv->base + SRCR(reg));
Here you don't.
> + spin_unlock_irqrestore(&priv->rmw_lock, flags);
> + return 0;
> +}
> +
> +static int cpg_mssr_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
> + unsigned int reg = id / 32;
> + unsigned int bit = id % 32;
> +
> + dev_dbg(priv->dev, "deassert %u%02u\n", reg, bit);
> +
> + writel(BIT(bit), priv->base + SRSTCLR(reg));
And here ...
> + return 0;
> +}
> +
> +static int cpg_mssr_status(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct cpg_mssr_priv *priv = rcdev_to_priv(rcdev);
> + unsigned int reg = id / 32;
> + unsigned int bit = id % 32;
> +
> + return !!(readl(priv->base + SRCR(reg)) & BIT(bit));
And here neither.
I'd choose one variant over the other for consistency.
regards
Philipp
next prev parent reply other threads:[~2017-01-20 16:20 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-20 14:08 [PATCH 0/8] Renesas CPG/MSSR Reset Control Support Geert Uytterhoeven
2017-01-20 14:08 ` [PATCH 1/8] clk: renesas: cpg-mssr: Document reset control support Geert Uytterhoeven
2017-01-21 0:31 ` Stephen Boyd
2017-01-20 14:08 ` [PATCH 2/8] clk: renesas: cpg-mssr: Document suitability for RZ/G1 Geert Uytterhoeven
2017-01-21 0:32 ` Stephen Boyd
2017-01-20 14:08 ` [PATCH 3/8] clk: renesas: cpg-mssr: Rename cpg_mssr_priv.mstp_lock Geert Uytterhoeven
2017-01-21 0:32 ` Stephen Boyd
2017-01-20 14:08 ` [PATCH 4/8] clk: renesas: cpg-mssr: Add support for reset control Geert Uytterhoeven
2017-01-20 15:57 ` Philipp Zabel [this message]
2017-01-20 18:03 ` Geert Uytterhoeven
2017-01-20 22:03 ` Niklas Söderlund
2017-01-23 10:14 ` Geert Uytterhoeven
2017-01-21 0:33 ` Stephen Boyd
2017-01-20 14:08 ` [PATCH 5/8] arm64: dts: r8a7795: Add reset control properties Geert Uytterhoeven
2017-01-20 14:08 ` [PATCH 6/8] arm64: dts: r8a7796: " Geert Uytterhoeven
2017-01-20 14:08 ` [PATCH 7/8] ARM: dts: r8a7743: " Geert Uytterhoeven
2017-01-20 14:08 ` [PATCH 8/8] ARM: dts: r8a7745: " Geert Uytterhoeven
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