From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755144AbdC1I7A (ORCPT ); Tue, 28 Mar 2017 04:59:00 -0400 Received: from gate.crashing.org ([63.228.1.57]:46602 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755118AbdC1I65 (ORCPT ); Tue, 28 Mar 2017 04:58:57 -0400 Message-ID: <1490691470.3177.114.camel@kernel.crashing.org> Subject: Re: [PATCH v6 4/5] i2c: aspeed: added driver for Aspeed I2C From: Benjamin Herrenschmidt To: Brendan Higgins , wsa@the-dreams.de, robh+dt@kernel.org, mark.rutland@arm.com, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, joel@jms.id.au, vz@mleia.com, mouse@mayc.ru, clg@kaod.org Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Date: Tue, 28 Mar 2017 19:57:50 +1100 In-Reply-To: <20170328051226.21677-5-brendanhiggins@google.com> References: <20170328051226.21677-1-brendanhiggins@google.com> <20170328051226.21677-5-brendanhiggins@google.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6 (3.22.6-1.fc25) Mime-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2017-03-27 at 22:12 -0700, Brendan Higgins wrote: > +/* 0x04 : I2CD Clock and AC Timing Control Register #1 */ > +#define ASPEED_I2CD_TIME_SCL_HIGH_SHIFT                        16 > +#define ASPEED_I2CD_TIME_SCL_HIGH_MASK                 GENMASK(19, 16) > +#define ASPEED_I2CD_TIME_SCL_LOW_SHIFT                 12 > +#define ASPEED_I2CD_TIME_SCL_LOW_MASK                  GENMASK(15, 12) > +#define ASPEED_I2CD_TIME_BASE_DIVISOR_MASK             GENMASK(3, 0) > +#define ASPEED_I2CD_TIME_SCL_REG_MAX                   GENMASK(3, 0) > +/* 0x08 : I2CD Clock and AC Timing Control Register #2 */ > +#define ASPEED_NO_TIMEOUT_CTRL                         0 Those are slightly different between the 2400 and 2500, allowing slightly more fine grained settings (faster base clock and thus higher numbers in high/low counts). I *think* that using the 2400 values as-is might work ok, at least it does for 100kHz but I would double check. I'll review the rest tomorrow. Cheers, Ben.