From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932921AbdCaFOU (ORCPT ); Fri, 31 Mar 2017 01:14:20 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:40445 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932693AbdCaFOO (ORCPT ); Fri, 31 Mar 2017 01:14:14 -0400 From: Sukadev Bhattiprolu To: Michael Ellerman Cc: Benjamin Herrenschmidt , michael.neuling@au1.ibm.com, stewart@linux.vnet.ibm.com, apopple@au1.ibm.com, hbabu@us.ibm.com, oohall@gmail.com, bsingharora@gmail.com, linuxppc-dev@ozlabs.org, Subject: [PATCH v4 05/11] VAS: Define helpers for access MMIO regions Date: Thu, 30 Mar 2017 22:13:38 -0700 X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490937224-29149-1-git-send-email-sukadev@linux.vnet.ibm.com> References: <1490937224-29149-1-git-send-email-sukadev@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 17033105-0016-0000-0000-00000679587C X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00006875; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000206; SDB=6.00841048; UDB=6.00414063; IPR=6.00619112; BA=6.00005248; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00014869; XFM=3.00000013; UTC=2017-03-31 05:14:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17033105-0017-0000-0000-000038996E45 Message-Id: <1490937224-29149-6-git-send-email-sukadev@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-03-31_04:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1702020001 definitions=main-1703310047 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Define some helper functions to access the MMIO regions. We use these in a follow-on patches to read/write VAS hardware registers. These helpers are also used to later issue 'paste' instructions to submit requests to the NX hardware engines. Signed-off-by: Sukadev Bhattiprolu --- Changelog [v3]: - Minor reorg/cleanup of map/unmap functions Changelog [v2]: - Get HVWC, UWC and paste addresses from window->vinst (i.e DT) rather than kernel macros. --- arch/powerpc/platforms/powernv/vas-window.c | 126 ++++++++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index 6156fbe..ec084d2 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -9,9 +9,135 @@ #include #include +#include +#include #include "vas.h" +/* + * Compute the paste address region for the window @window using the + * ->win_base_addr and ->win_id_shift we got from device tree. + */ +void compute_paste_address(struct vas_window *window, uint64_t *addr, int *len) +{ + uint64_t base, shift; + int winid; + + base = window->vinst->win_base_addr; + shift = window->vinst->win_id_shift; + winid = window->winid; + + *addr = base + (winid << shift); + *len = PAGE_SIZE; + + pr_debug("Txwin #%d: Paste addr 0x%llx\n", winid, *addr); +} + +static inline void get_hvwc_mmio_bar(struct vas_window *window, + uint64_t *start, int *len) +{ + uint64_t pbaddr; + + pbaddr = window->vinst->hvwc_bar_start; + *start = pbaddr + window->winid * VAS_HVWC_SIZE; + *len = VAS_HVWC_SIZE; +} + +static inline void get_uwc_mmio_bar(struct vas_window *window, + uint64_t *start, int *len) +{ + uint64_t pbaddr; + + pbaddr = window->vinst->uwc_bar_start; + *start = pbaddr + window->winid * VAS_UWC_SIZE; + *len = VAS_UWC_SIZE; +} + +static void *map_mmio_region(char *name, uint64_t start, int len) +{ + void *map; + + if (!request_mem_region(start, len, name)) { + pr_devel("%s(): request_mem_region(0x%llx, %d) failed\n", + __func__, start, len); + return NULL; + } + + map = __ioremap(start, len, pgprot_val(pgprot_cached(__pgprot(0)))); + if (!map) { + pr_devel("%s(): ioremap(0x%llx, %d) failed\n", __func__, start, + len); + return NULL; + } + + return map; +} + +/* + * Unmap the MMIO regions for a window. + */ +static void unmap_wc_paste_kaddr(struct vas_window *window) +{ + int len; + uint64_t busaddr_start; + + if (window->paste_kaddr) { + iounmap(window->paste_kaddr); + compute_paste_address(window, &busaddr_start, &len); + release_mem_region((phys_addr_t)busaddr_start, len); + window->paste_kaddr = NULL; + } + +} + +static void unmap_wc_mmio_bars(struct vas_window *window) +{ + int len; + uint64_t busaddr_start; + + unmap_wc_paste_kaddr(window); + + if (window->hvwc_map) { + iounmap(window->hvwc_map); + get_hvwc_mmio_bar(window, &busaddr_start, &len); + release_mem_region((phys_addr_t)busaddr_start, len); + window->hvwc_map = NULL; + } + + if (window->uwc_map) { + iounmap(window->uwc_map); + get_uwc_mmio_bar(window, &busaddr_start, &len); + release_mem_region((phys_addr_t)busaddr_start, len); + window->uwc_map = NULL; + } +} + +/* + * Find the Hypervisor Window Context (HVWC) MMIO Base Address Region and the + * OS/User Window Context (UWC) MMIO Base Address Region for the given window. + * Map these bus addresses and save the mapped kernel addresses in @window. + */ +int map_wc_mmio_bars(struct vas_window *window) +{ + int len; + uint64_t start; + + window->paste_kaddr = window->hvwc_map = window->uwc_map = NULL; + + get_hvwc_mmio_bar(window, &start, &len); + window->hvwc_map = map_mmio_region("HVWCM_Window", start, len); + + get_uwc_mmio_bar(window, &start, &len); + window->uwc_map = map_mmio_region("UWCM_Window", start, len); + + if (!window->hvwc_map || !window->uwc_map) { + unmap_wc_mmio_bars(window); + return -1; + } + + return 0; +} + /* stub for now */ int vas_win_close(struct vas_window *window) { -- 2.7.4