From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933589AbdDFGMH (ORCPT ); Thu, 6 Apr 2017 02:12:07 -0400 Received: from mailout2.samsung.com ([203.254.224.25]:15084 "EHLO epoutp02.samsung.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S932750AbdDFGK3 (ORCPT ); Thu, 6 Apr 2017 02:10:29 -0400 X-AuditID: b6c32a2c-f79be6d0000051f7-56-58e5dbcd56dd From: Smitha T Murthy To: linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Cc: kyungmin.park@samsung.com, kamil@wypas.org, jtp.park@samsung.com, a.hajda@samsung.com, mchehab@kernel.org, pankaj.dubey@samsung.com, krzk@kernel.org, m.szyprowski@samsung.com, s.nawrocki@samsung.com, Smitha T Murthy Subject: [Patch v4 09/12] [media] s5p-mfc: Add VP9 decoder support Date: Thu, 06 Apr 2017 11:41:42 +0530 Message-id: <1491459105-16641-10-git-send-email-smitha.t@samsung.com> X-Mailer: git-send-email 1.7.2.3 In-reply-to: <1491459105-16641-1-git-send-email-smitha.t@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAAzVSa0hTYRju27k6mpym2YeXikWmpiut4FRiFyoWWQhFWAR60NO0nI4dNzIC bWLqMNmPBDVNk1Qc6eTovJShzmGFmIk2ZKFYZuBd0sQws21n/nve5/Je4CUR6QzqT6amZ7Ka dCZNhovRtr7Q0IjBr9PxR80WKe1o+oTRtsYvIrrsQz5GDw01E/Sgfp6g+Sk7Ro+8qcDpomYL Rjfaxgm6jv8romssqwTdN+80j3e1gbMSBW8qxBUtr7IVxa0moFjh9ypGbY+JOOy2ODqZTUvV sZojMYnilJL2KlS9Jn+QZ6rBc0BOiAF4kZA6Dis/jhIC9oOfJ8y4AYhJKVUL4KbZgrkEKZUv grVdh7YDFQtzHlM9gO1bRk+xBaCxo8edwKlwuLY0gLuwL8XC2aZGzGVCqHUAHWtjqEvwoc7D pj/N7gBKHYQr5gU3llAXYVFdr0gYtx/OjjW69/Ny8g1v+92NIPWCgPW9hYgBkM4iCPI9iOC/ ALsn9Z57fODs+1YPDoCbtQ4gZHMBrGzLRQXBCGBDnlbAZ2DPaIWbRyhv+HTjh0joL4EFT6SC RQE3SsY80XPwu7kfEa4vBXDWUAqMILAa7DABP1bNqZQsd0IdKecYFadNV8qTMlQ8cD9AWHgH mKi+YgUUCWQ7Jcu66Xgpxui4LJUVQBKR+UqUz52UJJnJeshqMhI02jSWs4IAEpXtkYQ02OOl lJLJZO+zrJrVbKsi0ss/B2jt9/iqfSN4jTKrsnxXORMiKnq0aAuOtkYuXb71OuHZu5OJ/JIX v96d1CNlhk/ffPk7qPMbHTV8LSLh0kpcTHxxIPAtSPC9UVc9WVf2K4qIJfJ3a1Y7p3SnBlDH ovxA8LGZn7F3Dg/N2Tj9de/lf3dbArjY7FW74mog1lUo08tQLoWJDEM0HPMf+NsA8vwCAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupikeLIzCtJLcpLzFFi42I5/e+xgO6Z208jDM5Mtra4te4cq8WRtVeZ LGaeaGe1OH9+A7vF2aY37BabHl9jtbi8aw6bRc+GrawWa4/cZbdYtukPk8WirV/YLQ6/ASq+ u2cbowOvx6ZVnWwem5fUe/RtWcXo8XmTnMeVI43sAaxRbjYZqYkpqUUKqXnJ+SmZeem2SqEh broWSgp5ibmptkoRur4hQUoKZYk5pUCekQEacHAOcA9W0rdLcMuYun0+S8E3vYrWVYvYGhgb NLoYOTkkBEwk5rx9zQZhi0lcuLceyObiEBJYyijxaOMLZpCEkEAjk8SsWaIgNpuAjsS396fB GkQEUiXWbj3PCtLALPCDUaLpwEt2kISwgJPEup8bWEFsFgFVic/r34LZvAKuEj3LDjJBbFOQ eHVjLVg9J1B85e5jrBDLXCRunF/CNIGRdwEjwypGidSC5ILipPRco7zUcr3ixNzi0rx0veT8 3E2M4Hh4Jr2D8fAu90OMAhyMSjy8Ho+fRAixJpYVV+YeYpTgYFYS4U2f/TRCiDclsbIqtSg/ vqg0J7X4EKMp0GETmaVEk/OBsZpXEm9oYm5ibmxgYW5paWKkJM7bOPtZuJBAemJJanZqakFq EUwfEwenVAOj2Abh/3Mf7JjBwLz5lYKGzt9mqwUrVgW4GfpFP8ksfHqittLeWf+g1dbQ1L2R nh+MZI8/kHozb7+h60fm8lyOhk3f1F9uVWniaTc6oxB4PF4ooGnTIfmFngufXtHeaXx0Glfv yoDzKUf2mS2q+3oyxXTF1b2izu9vTZyuwqvwWyo+8P7rtm3VSizFGYmGWsxFxYkASKvCtZ0C AAA= X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20170406061021epcas5p25af9b201e7e990bd7c2ade8ec765655a X-Msg-Generator: CA X-Sender-IP: 203.254.230.27 X-Local-Sender: =?UTF-8?B?U21pdGhhIFQgTXVydGh5G1NTSVItVHVybiBLZXkgU29sdXRp?= =?UTF-8?B?b25zG+yCvOyEseyghOyekBtMZWFkIEVuZ2luZWVy?= X-Global-Sender: =?UTF-8?B?U21pdGhhIFQgTXVydGh5G1NTSVItVHVybiBLZXkgU29sdXRp?= =?UTF-8?B?b25zG1NhbXN1bmcgRWxlY3Ryb25pY3MbTGVhZCBFbmdpbmVlcg==?= X-Sender-Code: =?UTF-8?B?QzEwG1NXQUhRG0MxMElEMDdJRDAxMDk5Nw==?= CMS-TYPE: 105P X-CMS-RootMailID: 20170406061021epcas5p25af9b201e7e990bd7c2ade8ec765655a X-RootMTR: 20170406061021epcas5p25af9b201e7e990bd7c2ade8ec765655a References: <1491459105-16641-1-git-send-email-smitha.t@samsung.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for codec definition and corresponding buffer requirements for VP9 decoder. Signed-off-by: Smitha T Murthy Reviewed-by: Andrzej Hajda --- drivers/media/platform/s5p-mfc/regs-mfc-v10.h | 6 ++++++ drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c | 3 +++ drivers/media/platform/s5p-mfc/s5p_mfc_common.h | 1 + drivers/media/platform/s5p-mfc/s5p_mfc_dec.c | 7 +++++++ drivers/media/platform/s5p-mfc/s5p_mfc_opr.h | 2 ++ drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c | 26 +++++++++++++++++++++++++ 6 files changed, 45 insertions(+) diff --git a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h index 953a073..6754477 100644 --- a/drivers/media/platform/s5p-mfc/regs-mfc-v10.h +++ b/drivers/media/platform/s5p-mfc/regs-mfc-v10.h @@ -18,6 +18,8 @@ /* MFCv10 register definitions*/ #define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120 #define S5P_FIMV_MFC_STATE_V10 0x7124 +#define S5P_FIMV_D_STATIC_BUFFER_ADDR_V10 0xF570 +#define S5P_FIMV_D_STATIC_BUFFER_SIZE_V10 0xF574 /* MFCv10 Context buffer sizes */ #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K) @@ -34,8 +36,12 @@ /* MFCv10 codec defines*/ #define S5P_FIMV_CODEC_HEVC_DEC 17 +#define S5P_FIMV_CODEC_VP9_DEC 18 #define S5P_FIMV_CODEC_HEVC_ENC 26 +/* Decoder buffer size for MFC v10 */ +#define DEC_VP9_STATIC_BUFFER_SIZE 20480 + /* Encoder buffer size for MFC v10.0 */ #define ENC_V100_BASE_SIZE(x, y) \ (((x + 3) * (y + 3) * 8) \ diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c index 76eca67..102b47e 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_cmd_v6.c @@ -104,6 +104,9 @@ static int s5p_mfc_open_inst_cmd_v6(struct s5p_mfc_ctx *ctx) case S5P_MFC_CODEC_HEVC_DEC: codec_type = S5P_FIMV_CODEC_HEVC_DEC; break; + case S5P_MFC_CODEC_VP9_DEC: + codec_type = S5P_FIMV_CODEC_VP9_DEC; + break; case S5P_MFC_CODEC_H264_ENC: codec_type = S5P_FIMV_CODEC_H264_ENC_V6; break; diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h index 828e07e..b49f220 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_common.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_common.h @@ -73,6 +73,7 @@ #define S5P_MFC_CODEC_VC1RCV_DEC 6 #define S5P_MFC_CODEC_VP8_DEC 7 #define S5P_MFC_CODEC_HEVC_DEC 17 +#define S5P_MFC_CODEC_VP9_DEC 18 #define S5P_MFC_CODEC_H264_ENC 20 #define S5P_MFC_CODEC_H264_MVC_ENC 21 diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c index 4749355..5cf4d99 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_dec.c @@ -151,6 +151,13 @@ static struct s5p_mfc_fmt formats[] = { .num_planes = 1, .versions = MFC_V10_BIT, }, + { + .fourcc = V4L2_PIX_FMT_VP9, + .codec_mode = S5P_FIMV_CODEC_VP9_DEC, + .type = MFC_FMT_DEC, + .num_planes = 1, + .versions = MFC_V10_BIT, + }, }; #define NUM_FORMATS ARRAY_SIZE(formats) diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h index e7a2d46..57f4560 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr.h @@ -170,6 +170,8 @@ struct s5p_mfc_regs { void __iomem *d_used_dpb_flag_upper;/* v7 and v8 */ void __iomem *d_used_dpb_flag_lower;/* v7 and v8 */ void __iomem *d_min_scratch_buffer_size; /* v10 */ + void __iomem *d_static_buffer_addr; /* v10 */ + void __iomem *d_static_buffer_size; /* v10 */ /* encoder registers */ void __iomem *e_frame_width; diff --git a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c index 979c4ce..cb0380b 100644 --- a/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c +++ b/drivers/media/platform/s5p-mfc/s5p_mfc_opr_v6.c @@ -226,6 +226,12 @@ static int s5p_mfc_alloc_codec_buffers_v6(struct s5p_mfc_ctx *ctx) ctx->scratch_buf_size + (ctx->mv_count * ctx->mv_size); break; + case S5P_MFC_CODEC_VP9_DEC: + mfc_debug(2, "Use min scratch buffer size\n"); + ctx->bank1.size = + ctx->scratch_buf_size + + DEC_VP9_STATIC_BUFFER_SIZE; + break; case S5P_MFC_CODEC_H264_ENC: if (IS_MFCV10(dev)) { mfc_debug(2, "Use min scratch buffer size\n"); @@ -336,6 +342,7 @@ static int s5p_mfc_alloc_instance_buffer_v6(struct s5p_mfc_ctx *ctx) case S5P_MFC_CODEC_VC1_DEC: case S5P_MFC_CODEC_MPEG2_DEC: case S5P_MFC_CODEC_VP8_DEC: + case S5P_MFC_CODEC_VP9_DEC: ctx->ctx.size = buf_size->other_dec_ctx; break; case S5P_MFC_CODEC_H264_ENC: @@ -566,6 +573,13 @@ static int s5p_mfc_set_dec_frame_buffer_v6(struct s5p_mfc_ctx *ctx) buf_size1 -= frame_size_mv; } } + if (ctx->codec_mode == S5P_FIMV_CODEC_VP9_DEC) { + writel(buf_addr1, mfc_regs->d_static_buffer_addr); + writel(DEC_VP9_STATIC_BUFFER_SIZE, + mfc_regs->d_static_buffer_size); + buf_addr1 += DEC_VP9_STATIC_BUFFER_SIZE; + buf_size1 -= DEC_VP9_STATIC_BUFFER_SIZE; + } mfc_debug(2, "Buf1: %zx, buf_size1: %d (frames %d)\n", buf_addr1, buf_size1, ctx->total_dpb_count); @@ -2272,6 +2286,18 @@ const struct s5p_mfc_regs *s5p_mfc_init_regs_v6_plus(struct s5p_mfc_dev *dev) R(e_h264_options, S5P_FIMV_E_H264_OPTIONS_V8); R(e_min_scratch_buffer_size, S5P_FIMV_E_MIN_SCRATCH_BUFFER_SIZE_V8); + if (!IS_MFCV10(dev)) + goto done; + + /* Initialize registers used in MFC v10 only. + * Also, over-write the registers which have + * a different offset for MFC v10. + */ + + /* decoder registers */ + R(d_static_buffer_addr, S5P_FIMV_D_STATIC_BUFFER_ADDR_V10); + R(d_static_buffer_size, S5P_FIMV_D_STATIC_BUFFER_SIZE_V10); + done: return &mfc_regs; #undef S5P_MFC_REG_ADDR -- 2.7.4