From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S971148AbdDTQYs (ORCPT ); Thu, 20 Apr 2017 12:24:48 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:47121 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S971021AbdDTQYp (ORCPT ); Thu, 20 Apr 2017 12:24:45 -0400 From: To: , , , , , , , CC: , , , , , , , Sean Wang Subject: [PATCH v2 1/2] dt-bindings: hwrng: Add Mediatek hardware random generator bindings Date: Fri, 21 Apr 2017 00:24:25 +0800 Message-ID: <1492705466-27287-2-git-send-email-sean.wang@mediatek.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1492705466-27287-1-git-send-email-sean.wang@mediatek.com> References: <1492705466-27287-1-git-send-email-sean.wang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Wang Document the devicetree bindings for Mediatek random number generator which could be found on MT7623 SoC or other similar Mediatek SoCs. Signed-off-by: Sean Wang Acked-by: Rob Herring --- Documentation/devicetree/bindings/rng/mtk-rng.txt | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/mtk-rng.txt diff --git a/Documentation/devicetree/bindings/rng/mtk-rng.txt b/Documentation/devicetree/bindings/rng/mtk-rng.txt new file mode 100644 index 0000000..a6d62a2 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/mtk-rng.txt @@ -0,0 +1,18 @@ +Device-Tree bindings for Mediatek random number generator +found in Mediatek SoC family + +Required properties: +- compatible : Should be "mediatek,mt7623-rng" +- clocks : list of clock specifiers, corresponding to + entries in clock-names property; +- clock-names : Should contain "rng" entries; +- reg : Specifies base physical address and size of the registers + +Example: + +rng: rng@1020f000 { + compatible = "mediatek,mt7623-rng"; + reg = <0 0x1020f000 0 0x1000>; + clocks = <&infracfg CLK_INFRA_TRNG>; + clock-names = "rng"; +}; -- 1.9.1