From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1172490AbdDXO1z (ORCPT ); Mon, 24 Apr 2017 10:27:55 -0400 Received: from mga07.intel.com ([134.134.136.100]:51404 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1428132AbdDXO1f (ORCPT ); Mon, 24 Apr 2017 10:27:35 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,244,1488873600"; d="scan'208";a="252796175" Message-ID: <1493044041.24567.166.camel@linux.intel.com> Subject: Re: [PATCH v1 2/2] gpio: gpio-wcove: fix irq pending status bit width From: Andy Shevchenko To: Linus Walleij , Kuppuswamy Sathyanarayanan Cc: Alexandre Courbot , "linux-gpio@vger.kernel.org" , "linux-kernel@vger.kernel.org" , sathyaosid@gmail.com, Mika Westerberg Date: Mon, 24 Apr 2017 17:27:21 +0300 In-Reply-To: References: <197e6ca51bb83ae865022d7ffd085d06dfee7795.1492190203.git.sathyanarayanan.kuppuswamy@linux.intel.com> Organization: Intel Finland Oy Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.22.6-1 Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 2017-04-24 at 15:15 +0200, Linus Walleij wrote: > On Fri, Apr 14, 2017 at 7:29 PM, > wrote: > > > From: Kuppuswamy Sathyanarayanan > ntel.com> > > > > Whiskey cove PMIC has three GPIO banks with total number of 13 GPIO > > pins. But when checking for the pending status, for_each_set_bit() > > uses > > bit width of 7 and hence it only checks the status for first 7 GPIO > > pins > > missing to check/clear the status of rest of the GPIO pins. This > > patch > > fixes this issue. > > > > Signed-off-by: Kuppuswamy Sathyanarayanan > y@linux.intel.com> > > Looks reasonable so patch applied. > > Just looping in Mika & Andy so they have an idea about what's going > on. This is fine by me, thanks! -- Andy Shevchenko Intel Finland Oy