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From: Ding Tianhong <dingtianhong@huawei.com>
To: <leedom@chelsio.com>, <ashok.raj@intel.com>, <helgaas@kernel.org>,
	<werner@chelsio.com>, <ganeshgr@chelsio.com>,
	<asit.k.mallick@intel.com>, <patrick.j.cramer@intel.com>,
	<Suravee.Suthikulpanit@amd.com>, <Bob.Shaw@amd.com>,
	<l.stach@pengutronix.de>, <amira@mellanox.com>,
	<gabriele.paoloni@huawei.com>, <David.Laight@aculab.com>,
	<jeffrey.t.kirsher@intel.com>, <catalin.marinas@arm.com>,
	<will.deacon@arm.com>, <mark.rutland@arm.com>,
	<robin.murphy@arm.com>, <davem@davemloft.net>,
	<alexander.duyck@gmail.com>,
	<linux-arm-kernel@lists.infradead.org>, <netdev@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Cc: Ding Tianhong <dingtianhong@huawei.com>
Subject: [PATCH v2 0/3] Add new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag
Date: Sat, 3 Jun 2017 12:04:04 +0800	[thread overview]
Message-ID: <1496462647-7632-1-git-send-email-dingtianhong@huawei.com> (raw)

Some devices have problems with Transaction Layer Packets with the Relaxed
Ordering Attribute set.  This patch set adds a new PCIe Device Flag,
PCI_DEV_FLAGS_NO_RELAXED_ORDERING, a set of PCI Quirks to catch some known
devices with Relaxed Ordering issues, and a use of this new flag by the
cxgb4 driver to avoid using Relaxed Ordering with problematic Root Complex
Ports.

It's been years since I've submitted kernel.org patches, I appolgise for the
almost certain submission errors.

v2: Alexander point out that the v1 was only a part of the whole solution,
    some platform which has some issues could use the new flag to indicate
    that it is not safe to enable relaxed ordering attribute, then we need
    to clear the relaxed ordering enable bits in the PCI configuration when
    initializing the device. So add a new second patch to modify the PCI
    initialization code to clear the relaxed ordering enable bit in the
    event that the root complex doesn't want relaxed ordering enabled.

    The third patch was base on the v1's second patch and only be changed
    to query the relaxed ordering enable bit in the PCI configuration space
    to allow the Chelsio NIC to send TLPs with the relaxed ordering attributes
    set.

    This version didn't plan to drop the defines for Intel Drivers to use the
    new checking way to enable relaxed ordering because it is not the hardest
    part of the moment, we could fix it in next patchset when this patches
    reach the goal.  

Casey Leedom (2):
  PCI: Add new PCIe Fabric End Node flag,
    PCI_DEV_FLAGS_NO_RELAXED_ORDERING
  net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag

Ding Tianhong (1):
  PCI: Enable PCIe Relaxed Ordering if supported

 drivers/net/ethernet/chelsio/cxgb4/cxgb4.h      |  1 +
 drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 17 ++++++++++
 drivers/net/ethernet/chelsio/cxgb4/sge.c        |  5 +--
 drivers/pci/pci.c                               | 42 +++++++++++++++++++++++++
 drivers/pci/probe.c                             | 11 +++++++
 drivers/pci/quirks.c                            | 38 ++++++++++++++++++++++
 include/linux/pci.h                             |  5 +++
 7 files changed, 117 insertions(+), 2 deletions(-)

-- 
1.9.0

             reply	other threads:[~2017-06-03  4:05 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-03  4:04 Ding Tianhong [this message]
2017-06-03  4:04 ` [PATCH v2 1/3] PCI: Add new PCIe Fabric End Node flag, PCI_DEV_FLAGS_NO_RELAXED_ORDERING Ding Tianhong
2017-06-03  4:04 ` [PATCH v2 2/3] PCI: Enable PCIe Relaxed Ordering if supported Ding Tianhong
2017-06-03  6:02   ` kbuild test robot
2017-06-03 18:19   ` Alexander Duyck
2017-06-04  3:07     ` Ding Tianhong
2017-06-05 13:33     ` Ding Tianhong
2017-06-06  0:28       ` Alexander Duyck
2017-06-06  6:09         ` Ding Tianhong
2017-06-03  4:04 ` [PATCH v2 3/3] net/cxgb4: Use new PCI_DEV_FLAGS_NO_RELAXED_ORDERING flag Ding Tianhong

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