From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752876AbdFNPKq (ORCPT ); Wed, 14 Jun 2017 11:10:46 -0400 Received: from szxga02-in.huawei.com ([45.249.212.188]:7851 "EHLO szxga02-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752310AbdFNPER (ORCPT ); Wed, 14 Jun 2017 11:04:17 -0400 From: John Garry To: , CC: , , , , , "John Garry" Subject: [PATCH v6 08/22] scsi: hisi_sas: create hisi_sas_get_fw_info() Date: Wed, 14 Jun 2017 23:33:18 +0800 Message-ID: <1497454412-91194-9-git-send-email-john.garry@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1497454412-91194-1-git-send-email-john.garry@huawei.com> References: <1497454412-91194-1-git-send-email-john.garry@huawei.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.67.212.75] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A090203.5941503F.00CD,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: ccdb2b1c8a4499d27f9fb612217889d6 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Move the functionality to retrieve the fw info into a dedicated device type-agnostic function, hisi_sas_get_fw_info(). The reasoning is that this function will be required for future pci-based platforms. Also add some debug logs for failure. Signed-off-by: John Garry --- drivers/scsi/hisi_sas/hisi_sas.h | 1 + drivers/scsi/hisi_sas/hisi_sas_main.c | 107 ++++++++++++++++++++++------------ 2 files changed, 71 insertions(+), 37 deletions(-) diff --git a/drivers/scsi/hisi_sas/hisi_sas.h b/drivers/scsi/hisi_sas/hisi_sas.h index 84cac98..c1f6669 100644 --- a/drivers/scsi/hisi_sas/hisi_sas.h +++ b/drivers/scsi/hisi_sas/hisi_sas.h @@ -371,6 +371,7 @@ struct hisi_sas_command_table_ssp { extern void hisi_sas_sata_done(struct sas_task *task, struct hisi_sas_slot *slot); extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag); +extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); extern int hisi_sas_probe(struct platform_device *pdev, const struct hisi_sas_hw *ops); extern int hisi_sas_remove(struct platform_device *pdev); diff --git a/drivers/scsi/hisi_sas/hisi_sas_main.c b/drivers/scsi/hisi_sas/hisi_sas_main.c index 139df45..81c053c 100644 --- a/drivers/scsi/hisi_sas/hisi_sas_main.c +++ b/drivers/scsi/hisi_sas/hisi_sas_main.c @@ -1729,66 +1729,99 @@ static void hisi_sas_rst_work_handler(struct work_struct *work) hisi_sas_controller_reset(hisi_hba); } -static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev, - const struct hisi_sas_hw *hw) +int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba) { - struct resource *res; - struct Scsi_Host *shost; - struct hisi_hba *hisi_hba; - struct device *dev = &pdev->dev; - struct device_node *np = pdev->dev.of_node; + struct device *dev = hisi_hba->dev; + struct platform_device *pdev = hisi_hba->platform_dev; + struct device_node *np = pdev ? pdev->dev.of_node : NULL; struct clk *refclk; - shost = scsi_host_alloc(&hisi_sas_sht, sizeof(*hisi_hba)); - if (!shost) { - dev_err(dev, "scsi host alloc failed\n"); - return NULL; - } - hisi_hba = shost_priv(shost); - - INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler); - hisi_hba->hw = hw; - hisi_hba->platform_dev = pdev; - hisi_hba->dev = dev; - hisi_hba->shost = shost; - SHOST_TO_SAS_HA(shost) = &hisi_hba->sha; - - init_timer(&hisi_hba->timer); - if (device_property_read_u8_array(dev, "sas-addr", hisi_hba->sas_addr, - SAS_ADDR_SIZE)) - goto err_out; + SAS_ADDR_SIZE)) { + dev_err(dev, "could not get property sas-addr\n"); + return -ENOENT; + } if (np) { + /* + * These properties are only required for platform device-based + * controller with DT firmware. + */ hisi_hba->ctrl = syscon_regmap_lookup_by_phandle(np, "hisilicon,sas-syscon"); - if (IS_ERR(hisi_hba->ctrl)) - goto err_out; + if (IS_ERR(hisi_hba->ctrl)) { + dev_err(dev, "could not get syscon\n"); + return -ENOENT; + } if (device_property_read_u32(dev, "ctrl-reset-reg", - &hisi_hba->ctrl_reset_reg)) - goto err_out; + &hisi_hba->ctrl_reset_reg)) { + dev_err(dev, + "could not get property ctrl-reset-reg\n"); + return -ENOENT; + } if (device_property_read_u32(dev, "ctrl-reset-sts-reg", - &hisi_hba->ctrl_reset_sts_reg)) - goto err_out; + &hisi_hba->ctrl_reset_sts_reg)) { + dev_err(dev, + "could not get property ctrl-reset-sts-reg\n"); + return -ENOENT; + } if (device_property_read_u32(dev, "ctrl-clock-ena-reg", - &hisi_hba->ctrl_clock_ena_reg)) - goto err_out; + &hisi_hba->ctrl_clock_ena_reg)) { + dev_err(dev, + "could not get property ctrl-clock-ena-reg\n"); + return -ENOENT; + } } - refclk = devm_clk_get(&pdev->dev, NULL); + refclk = devm_clk_get(dev, NULL); if (IS_ERR(refclk)) dev_dbg(dev, "no ref clk property\n"); else hisi_hba->refclk_frequency_mhz = clk_get_rate(refclk) / 1000000; - if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) - goto err_out; + if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) { + dev_err(dev, "could not get property phy-count\n"); + return -ENOENT; + } if (device_property_read_u32(dev, "queue-count", - &hisi_hba->queue_count)) + &hisi_hba->queue_count)) { + dev_err(dev, "could not get property queue-count\n"); + return -ENOENT; + } + + return 0; +} +EXPORT_SYMBOL_GPL(hisi_sas_get_fw_info); + +static struct Scsi_Host *hisi_sas_shost_alloc(struct platform_device *pdev, + const struct hisi_sas_hw *hw) +{ + struct resource *res; + struct Scsi_Host *shost; + struct hisi_hba *hisi_hba; + struct device *dev = &pdev->dev; + + shost = scsi_host_alloc(&hisi_sas_sht, sizeof(*hisi_hba)); + if (!shost) { + dev_err(dev, "scsi host alloc failed\n"); + return NULL; + } + hisi_hba = shost_priv(shost); + + INIT_WORK(&hisi_hba->rst_work, hisi_sas_rst_work_handler); + hisi_hba->hw = hw; + hisi_hba->dev = dev; + hisi_hba->platform_dev = pdev; + hisi_hba->shost = shost; + SHOST_TO_SAS_HA(shost) = &hisi_hba->sha; + + init_timer(&hisi_hba->timer); + + if (hisi_sas_get_fw_info(hisi_hba) < 0) goto err_out; if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)) && -- 1.9.1